72点 ili9806e 白屏啊。
static struct LCM_setting_table lcm_initialization_setting[] = {
/*
Note :
Data ID will depends on the following rule.
count of parameters > 1 => Data ID = 0x39
count of parameters = 1 => Data ID = 0x15
count of parameters = 0 => Data ID = 0x05
Structure Format :
{DCS command, count of parameters, {parameter list}}
{REGFLAG_DELAY, milliseconds of time, {}},
...
Setting ending by predefined flag
{REGFLAG_END_OF_TABLE, 0x00, {}}
*/
//==============================================
//****************************** Page 1 Command ******************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x01}}, //{REGFLAG_DELAY, 1,{}}, // Change to Page 1
{0x08,1,{0x10}}, //{REGFLAG_DELAY, 1,{}}, // output SDA
{0x21,1,{0x01}}, //{REGFLAG_DELAY, 1,{}}, // DE = 1 Active
{0X30,1,{0x02}}, //{REGFLAG_DELAY, 1,{}}, // 480 X 800
{0x31,1,{0x02}}, //{REGFLAG_DELAY, 1,{}}, // 2-dot Inversion
{0x40,1,{0x11}}, //{REGFLAG_DELAY, 1,{}}, // BT +2.5/-2.5 pump for DDVDH-L
{0x41,1,{0x11}}, //{REGFLAG_DELAY, 1,{}}, // DVDDH DVDDL clamp
{0x42,1,{0x01}}, //{REGFLAG_DELAY, 1,{}}, // VGH/VGL
{0x43,1,{0x09}}, //{REGFLAG_DELAY, 1,{}},
{0x44,1,{0x87}}, //{REGFLAG_DELAY, 1,{}},
{0x50,1,{0x70}}, //{REGFLAG_DELAY, 1,{}}, // VGMP
{0x51,1,{0x70}}, //{REGFLAG_DELAY, 1,{}}, // VGMN
{0x52,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, //Flicker MSB
{0x53,1,{0x4C}}, //{REGFLAG_DELAY, 1,{}}, //Flicker LSB
{0x57,1,{0x50}}, //{REGFLAG_DELAY, 1,{}}, //
{0x60,1,{0x07}}, //{REGFLAG_DELAY, 1,{}}, // SDTI
{0x61,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // CRTI
{0x62,1,{0x0A}}, //{REGFLAG_DELAY, 1,{}}, // EQTI
{0x63,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // PCTI
//++++++++++++++++++ Gamma Setting ++++++++++++++++++//}},
{0xA0,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 0
{0xA1,1,{0x0C}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 4
{0xA2,1,{0x15}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 8
{0xA3,1,{0x13}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 16
{0xA4,1,{0x09}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 24
{0xA5,1,{0x19}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 52
{0xA6,1,{0x08}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 80
{0xA7,1,{0x08}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 108
{0xA8,1,{0x05}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 147
{0xA9,1,{0x0F}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 175
{0xAA,1,{0x03}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 203
{0xAB,1,{0x09}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 231
{0xAC,1,{0x13}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 239
{0xAD,1,{0x31}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 247
{0xAE,1,{0x24}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 251
{0xAF,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 255
///==============Nagitive
{0xC0,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 0
{0xC1,1,{0x0B}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 4
{0xC2,1,{0x1A}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 8
{0xC3,1,{0x0C}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 16
{0xC4,1,{0x0A}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 24
{0xC5,1,{0x0F}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 52
{0xC6,1,{0x09}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 80
{0xC7,1,{0x07}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 108
{0xC8,1,{0x03}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 147
{0xC9,1,{0x01}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 175
{0xCA,1,{0x0A}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 203
{0xCB,1,{0x02}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 231
{0xCC,1,{0x09}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 239
{0xCD,1,{0x25}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 247
{0xCE,1,{0x25}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 251
{0xCF,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, // Gamma 255
//+++++++++++++++++++++++++++++++++++++++++++++++++++//
//****************************** Page 6 Command ******************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x06}}, //{REGFLAG_DELAY, 1,{}},// Change to Page 6
{0x00,1,{0x21}}, //{REGFLAG_DELAY, 1,{}}, //1
{0x01,1,{0x06}}, //{REGFLAG_DELAY, 1,{}}, //2
{0x02,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, //3
{0x03,1,{0x00}}, //{REGFLAG_DELAY, 1,{}}, //4
{0x04,1,{0x16}}, //{REGFLAG_DELAY, 1,{}}, //5
{0x05,1,{0x16}}, //{REGFLAG_DELAY, 1,{}}, //6
{0x06,1,{0x80}}, //{REGFLAG_DELAY, 1,{}}, //7
{0x07,1,{0x02}}, //{REGFLAG_DELAY, 1,{}}, //8
{0x08,1,{0x07}}, //{REGFLAG_DELAY, 1,{}},
{0x09,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x0A,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x0B,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x0C,1,{0x16}}, //{REGFLAG_DELAY, 1,{}},
{0x0D,1,{0x16}}, //{REGFLAG_DELAY, 1,{}},
{0x0E,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x0F,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x10,1,{0x77}}, //{REGFLAG_DELAY, 1,{}},
{0x11,1,{0xF0}}, //{REGFLAG_DELAY, 1,{}},
{0x12,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x13,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x14,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x15,1,{0xC0}}, //{REGFLAG_DELAY, 1,{}},
{0x16,1,{0x0B}}, //{REGFLAG_DELAY, 1,{}},
{0x17,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x18,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x19,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x1A,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x1B,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x1C,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x1D,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0X20,1,{0x01}}, //{REGFLAG_DELAY, 1,{}},
{0x21,1,{0x23}}, //{REGFLAG_DELAY, 1,{}},
{0x22,1,{0x45}}, //{REGFLAG_DELAY, 1,{}},
{0x23,1,{0x67}}, //{REGFLAG_DELAY, 1,{}},
{0x24,1,{0x01}}, //{REGFLAG_DELAY, 1,{}},
{0x25,1,{0x23}}, //{REGFLAG_DELAY, 1,{}},
{0x26,1,{0x45}}, //{REGFLAG_DELAY, 1,{}},
{0x27,1,{0x67}}, //{REGFLAG_DELAY, 1,{}},
{0x30,1,{0x11}}, //{REGFLAG_DELAY, 1,{}},
{0x31,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x32,1,{0x11}}, //{REGFLAG_DELAY, 1,{}},
{0x33,1,{0x00}}, //{REGFLAG_DELAY, 1,{}},
{0x34,1,{0x66}}, //{REGFLAG_DELAY, 1,{}},
{0x35,1,{0x88}}, //{REGFLAG_DELAY, 1,{}},
{0x36,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x37,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x38,1,{0xAA}}, //{REGFLAG_DELAY, 1,{}},
{0x39,1,{0xCC}}, //{REGFLAG_DELAY, 1,{}},
{0x3A,1,{0xBB}}, //{REGFLAG_DELAY, 1,{}},
{0x3B,1,{0xDD}}, //{REGFLAG_DELAY, 1,{}},
{0x3C,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x3D,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x3E,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x3F,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x40,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x52,1,{0x10}}, //{REGFLAG_DELAY, 1,{}},
{0x53,1,{0x10}}, //{REGFLAG_DELAY, 1,{}},
//****************************** Page 7 Command ******************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x07}}, // Change to Page 7
{0x17,1,{0x22}}, //{REGFLAG_DELAY, 1,{}},
{0x02,1,{0x77}}, //{REGFLAG_DELAY, 1,{}},
//****************************** Page 0 Command ******************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x00}}, //{REGFLAG_DELAY, 1,{}}, // Change to Page 0
//{0x36,1,01
{0x11,1,{0x00}}, {REGFLAG_DELAY, 120,{}}, // Sleep-Out 100
{0x29,1,{0x00}}, {REGFLAG_DELAY, 120, {}}, // Display On
//================================================
// Setting ending by predefined flag
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_sleep_out_setting[] = {
// Sleep Out
{0x11, 1, {0x00}},
{REGFLAG_DELAY, 120, {}},//100
// Display ON
{0x29, 1, {0x00}},
{REGFLAG_DELAY, 120, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_deep_sleep_mode_in_setting[] = {
// Display off sequence
{0x28, 1, {0x00}},
{REGFLAG_DELAY, 10, {}},
// Sleep Mode On
{0x10, 1, {0x00}},
{REGFLAG_DELAY, 120, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
{
unsigned int i;
for(i = 0; i < count; i++) {
unsigned cmd;
cmd = table.cmd;
switch (cmd) {
case REGFLAG_DELAY :
MDELAY(table.count);
break;
case REGFLAG_END_OF_TABLE :
break;
default:
dsi_set_cmdq_V2(cmd, table.count, table.para_list, force_update);
}
}
}
// ---------------------------------------------------------------------------
// LCM Driver Implementations
// ---------------------------------------------------------------------------
static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
{
meMCPy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
}
static void lcm_get_params(LCM_PARAMS *params)
{
mEMSet(params, 0, sizeof(LCM_PARAMS));
params->type = LCM_TYPE_DSI;
params->width = FRAME_WIDTH;
params->height = FRAME_HEIGHT;
// enable tearing-free
params->dbi.te_mode = LCM_DBI_TE_MODE_DISABLED;
params->dbi.te_edge_polarity = LCM_POLARITY_RISING;
params->dsi.mode = CMD_MODE;
// DSI
/* Command mode setting */
params->dsi.LANE_NUM = LCM_TWO_LANE;
//The following defined the fomat for data coming fROM LCD engine.
params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
params->dsi.intermediat_buffer_num = 0;//because DSI/DPI HW design change, this parameters should be 0 when video mode in MT658X; or memory leakage
params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
params->dsi.word_count=480*3; //DSI CMD mode need set these two bellow params, different to 6577
params->dsi.vertical_active_line=800;
params->dsi.compatibility_for_nvk = 0; // this parameter would be set to 1 if DriverIC is NTK's and when force match DSI clock for NTK's
// Bit rate calculation
#ifdef CONFIG_MT6589_FPGA
params->dsi.pll_div1=2; // div1=0,1,2,3;div1_real=1,2,4,4
params->dsi.pll_div2=2; // div2=0,1,2,3;div2_real=1,2,4,4
params->dsi.fbk_div =8; // fref=26MHz, fvco=fref*(fbk_div+1)*2/(div1_real*div2_real)
#else
params->dsi.pll_div1=1; // div1=0,1,2,3;div1_real=1,2,4,4
params->dsi.pll_div2=0; // div2=0,1,2,3;div2_real=1,2,4,4
params->dsi.fbk_div =17; // fref=26MHz, fvco=fref*(fbk_div+1)*2/(div1_real*div2_real)
#endif
}
static void lcm_hw_reset(void)
{
//mod by Tim
lcm_util.set_GPIO_mode(GPIO_DISP_LRSTB_PIN,GPIO_MODE_00);
lcm_util.set_gpio_dir(GPIO_DISP_LRSTB_PIN,GPIO_DIR_OUT);
lcm_util.set_gpio_out(GPIO_DISP_LRSTB_PIN, GPIO_OUT_ONE);//ZERO);
lcm_util.set_gpio_out(GPIO_DISP_LRSTB_PIN, GPIO_OUT_ZERO);
MDELAY(50);
lcm_util.set_gpio_out(GPIO_DISP_LRSTB_PIN, GPIO_OUT_ONE);
MDELAY(100);
//--end
}
static void lcm_init(void)
{
#ifdef BUILD_LK
printf("=>[LK] Tim Test : Enter lcm init start\n");
#else
printk("=>[Kernel] Tim Test : Enter lcm init startn\n");
#endif
SET_RESET_PIN(1);
SET_RESET_PIN(0);
MDELAY(200);
SET_RESET_PIN(1);
MDELAY(400);
//lcm_hw_reset();//add by Tim for HW reset.
push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
#ifdef BUILD_LK
printf("@[LK] Tim Test : Enter lcm init finished\n");
#else
printk("@[Kernel] Tim Test : Enter lcm init finished\n");
#endif
}
static void lcm_suspend(void)
{
push_table(lcm_deep_sleep_mode_in_setting, sizeof(lcm_deep_sleep_mode_in_setting) / sizeof(struct LCM_setting_table), 1);
}
static void lcm_resume(void)
{
push_table(lcm_sleep_out_setting, sizeof(lcm_sleep_out_setting) / sizeof(struct LCM_setting_table), 1);
}
static void lcm_update(unsigned int x, unsigned int y,
unsigned int width, unsigned int height)
{
//#ifdef BUILD_LK
//printf("=>[LK] Tim Test : Enter lcm_update \n");
//#else
//printk("=>[Kernel] Tim Test : Enter lcm_update \n");
//#endif
unsigned int x0 = x;
unsigned int y0 = y;
unsigned int x1 = x0 + width - 1;
unsigned int y1 = y0 + height - 1;
unsigned char x0_MSB = ((x0>>8)&0xFF);
unsigned char x0_LSB = (x0&0xFF);
unsigned char x1_MSB = ((x1>>8)&0xFF);
unsigned char x1_LSB = (x1&0xFF);
unsigned char y0_MSB = ((y0>>8)&0xFF);
unsigned char y0_LSB = (y0&0xFF);
unsigned char y1_MSB = ((y1>>8)&0xFF);
unsigned char y1_LSB = (y1&0xFF);
unsigned int data_array[16];
data_array[0]= 0x00053902;
data_array[1]= (x1_MSB<<24)|(x0_LSB<<16)|(x0_MSB<<8)|0x2a;
data_array[2]= (x1_LSB);
dsi_set_cmdq(data_array, 3, 1);
data_array[0]= 0x00053902;
data_array[1]= (y1_MSB<<24)|(y0_LSB<<16)|(y0_MSB<<8)|0x2b;
data_array[2]= (y1_LSB);
dsi_set_cmdq(data_array, 3, 1);
data_array[0]= 0x002c3909;
dsi_set_cmdq(data_array, 1, 0);
}
// ---------------------------------------------------------------------------
// Get LCM Driver Hooks
// ---------------------------------------------------------------------------
LCM_DRIVER ili9806e_drv =
{
.name = "ili9806e",
.set_util_funcs = lcm_set_util_funcs,
.get_params = lcm_get_params,
.init = lcm_init,
.suspend = lcm_suspend,
.resume = lcm_resume,
.update = lcm_update
};
请指点。
#define FRAME_WIDTH (480)
#define FRAME_HEIGHT (800)
#define REGFLAG_DELAY 0XFFE
#define REGFLAG_END_OF_TABLE 0xFFF // END OF REGISTERS MARKER
没有搞过智能机，不知道怎么看，不过就算搞过，你这样贴出来也不知道怎么看，你最好是把相关的文件压缩一起，传个附件，人家下载下来好对比
你的屏是VDO模式的吧
static void lcm_suspend(void)
{
// push_table(lcm_deep_sleep_mode_in_setting, sizeof(lcm_deep_sleep_mode_in_setting) / sizeof(struct LCM_setting_table), 1);
}
static void lcm_resume(void)
{
//push_table(lcm_sleep_out_setting, sizeof(lcm_sleep_out_setting) / sizeof(struct LCM_setting_table), 1);
}
至空你试一下
不行啊。
log信息：
=========================================
read the data of LOGO
[DISP] - disp_path_ddp_clock_on 0. 0xffdf7e00
DISP/panel is enabled
DISP/[Func]LCD_ConfigOVL
[DDP]disp_path_config_layer(), layer=2, source=0, fmt=1, addr=0x9fa00000, x=0, y=0
w=480, h=800, pitch=960, keyEn=0, key=0, aen=0, alpha=0
[DDP]disp_path_config_layer(), layer=3, source=0, fmt=1, addr=0x9fabb800, x=0, y=0
w=480, h=800, pitch=960, keyEn=1, key=-16777216, aen=0, alpha=0
DISP/Wait for TE_RDY timeout！
DISP/---------- Start dump DSI registers ----------
DISP/DSI+0000 : 0x00000001
DISP/DSI+0004 : 0x00000000
DISP/DSI+0008 : 0x00000010
DISP/DSI+000c : 0x80000000
DISP/DSI+0010 : 0x00000002
。
。
。
DISP/DSI_PHY+0084(0x10011084) : 0x00000000
DISP/DSI_PHY+0088(0x10011088) : 0x00000000
DISP/DSI_PHY+008c(0x1001108c) : 0x00000000
DISP/DSI_PHY+0090(0x10011090) : 0x00000000
DISP/ Wait for DSI engine not busy timeout！
DISP/---------- Start dump DSI registers ----------
DISP/DSI+0000 : 0x00000001
DISP/DSI+0004 : 0x00000020
DISP/DSI+0008 : 0x00000010
DISP/DSI+000c : 0x80000000
DISP/DSI+0010 : 0x00000002
估计是频率设置这块，#ifdef CONFIG_MT6589_FPGA
params->dsi.pll_div1=2; // div1=0,1,2,3;div1_real=1,2,4,4
params->dsi.pll_div2=2; // div2=0,1,2,3;div2_real=1,2,4,4
params->dsi.fbk_div =8; // fref=26MHz, fvco=fref*(fbk_div+1)*2/(div1_real*div2_real)
#else
params->dsi.pll_div1=1; // div1=0,1,2,3;div1_real=1,2,4,4
params->dsi.pll_div2=0; // div2=0,1,2,3;div2_real=1,2,4,4
params->dsi.fbk_div =17; // fref=26MHz, fvco=fref*(fbk_div+1)*2/(div1_real*div2_real)
#endif
最好问问屏厂这块对应的值
我也在调试，看看
看不懂，不过还是，能有个中文说明就好了
#ifndef BUILD_LK
#include <linux/string.h>
#include<linux/kernel.h>
#endif
#include "lcm_drv.h"
#define ADC_GUANCANGMAO_DATA 3415
//#define LCM_DEBUG
#ifdef LCM_DEBUG
#define TAG "[ili9806]"
#ifdef BUILD_LK
#define LCM_LOG(format, args...) printf(TAG":"format,##args)
#else
#define LCM_LOG(format, args...) printk(KERN_EMERG TAG":"format,##args)
#endif
#else
#define LCM_LOG(format, args...)
#endif
// ---------------------------------------------------------------------------
// Local Constants
// ---------------------------------------------------------------------------
#define FRAME_WIDTH (480)
#define FRAME_HEIGHT (854)
#define REGFLAG_DELAY 0XFFE
#define REGFLAG_END_OF_TABLE 0xFFF // END OF REGISTERS MARKER
#define LCM_DSI_CMD_MODE 0
#ifndef TRUE
#define TRUE 1
#endif
#ifndef FALSE
#define FALSE 0
#endif
static unsigned int lcm_compare_id();
// ---------------------------------------------------------------------------
// Local Variables
// ---------------------------------------------------------------------------
static LCM_UTIL_FUNCS lcm_util = {0};
#define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
#define UDELAY(n) (lcm_util.udelay(n))
#define MDELAY(n) (lcm_util.mdelay(n))
// ---------------------------------------------------------------------------
// Local Functions
// ---------------------------------------------------------------------------
#define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
#define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
#define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
#define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
#define read_reg lcm_util.dsi_read_reg()
#define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
struct LCM_setting_table {
unsigned cmd;
unsigned char count;
unsigned char para_list[64];
};
static struct LCM_setting_table lcm_initialization_setting[] = {
#if 0
//RESOLUTIONXY,0x480,0x854
//PORCHSETTING,0x2,0x20,0x20,0x10,0x60,0x200
//****************************************************************************//
//****************************** Page 1 Command ******************************//
//****************************************************************************//
// Change to Page 1
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x01}},
{0x08,0x1,{0x10}}, // output SDA
{0x21,0x1,{0x01}}, // DE = 1 Active
{0x30,0x1,{0x01}}, // 480 X 854
{0x31,0x1,{0x02}}, // COLUMN Inversion
{0x40,0x1,{0x16}}, // DDVDH/DDVDL 2.5/-3VCI
{0x41,0x1,{0x33}}, // DDVDH & DDVDL CLAMP 5.2V
{0x42,0x1,{0x02}}, // VGH/VGL 2DDVDH-DDVDL/DDVDL+VCL -VCIP
{0x43,0x1,{0x09}}, // VGH CLAMP 15V
{0x44,0x1,{0x06}}, // VGL CLAMP -10V
{0x50,0x1,{0x78}}, // VREG1 4.5V
{0x51,0x1,{0x78}}, // VREG2 -4.5 V
{0x52,0x1,{0x00}}, //Vcom
{0x53,0x1,{0x73}}, //Vcom
{0x57,0x1,{0x50}}, //LVD
{0x60,0x1,{0x07}}, // SDTI
{0x61,0x1,{0x00}}, // CRTI
{0x62,0x1,{0x09}}, // EQTI
{0x63,0x1,{0x00}}, // PCTI
//++++++++++++++++++ Gamma Setting ++++++++++++++++++//
{0xA0,0x1,{0x00}}, // Gamma 255
{0xA1,0x1,{0x15}}, // Gamma 251
{0xA2,0x1,{0x20}}, // Gamma 247
{0xA3,0x1,{0x0B}}, // Gamma 239 0B
{0xA4,0x1,{0x03}}, // Gamma 231
{0xA5,0x1,{0x10}}, // Gamma 203
{0xA6,0x1,{0x07}}, // Gamma 175
{0xA7,0x1,{0x04}}, // Gamma 147
{0xA8,0x1,{0x06}}, // Gamma 108
{0xA9,0x1,{0x0A}}, // Gamma 80
{0xAA,0x1,{0x09}}, // Gamma 52
{0xAB,0x1,{0x06}}, // Gamma 24
{0xAC,0x1,{0x04}}, // Gamma 16
{0xAD,0x1,{0x14}}, // Gamma 8
{0xAE,0x1,{0x0C}}, // Gamma 4
{0xAF,0x1,{0x00}}, // Gamma 0
///==============Negative
{0xC0,0x1,{0x00}}, // Gamma 255
{0xC1,0x1,{0x1A}}, // Gamma 251
{0xC2,0x1,{0x20}}, // Gamma 247
{0xC3,0x1,{0x0B}}, // Gamma 239 0B
{0xC4,0x1,{0x04}}, // Gamma 231
{0xC5,0x1,{0x07}}, // Gamma 203
{0xC6,0x1,{0x06}}, // Gamma 175
{0xC7,0x1,{0x07}}, // Gamma 147
{0xC8,0x1,{0x06}}, // Gamma 108
{0xC9,0x1,{0x0B}}, // Gamma 80
{0xCA,0x1,{0x13}}, // Gamma 52
{0xCB,0x1,{0x05}}, // Gamma 24
{0xCC,0x1,{0x14}}, // Gamma 16
{0xCD,0x1,{0x15}}, // Gamma 8
{0xCE,0x1,{0x0C}}, // Gamma 4
{0xCF,0x1,{0x00}}, // Gamma 0
//****************************************************************************//
//****************************** Page 6 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x06}}, // Change to Page 6
{0x00,0x1,{0x21}},
{0x01,0x1,{0x09}},
{0x02,0x1,{0x00 }},
{0x03,0x1,{0x00}},
{0x04,0x1,{0x01}},
{0x05,0x1,{0x01}},
{0x06,0x1,{0x80}},
{0x07,0x1,{0x05}},
{0x08,0x1,{0x02}},
{0x09,0x1,{0x00}},
{0x0A,0x1,{0x00}},
{0x0B,0x1,{0x00}},
{0x0C,0x1,{0x01}},
{0x0D,0x1,{0x01}},
{0x0E,0x1,{0x00}},
{0x0F,0x1,{0x00}},
{0x10,0x1,{0xE0}},
{0x11,0x1,{0xE0}},
{0x12,0x1,{0x00}},
{0x13,0x1,{0x00}},
{0x14,0x1,{0x00}},
{0x15,0x1,{0xC0}},
{0x16,0x1,{0x08}},
{0x17,0x1,{0x00}},
{0x18,0x1,{0x00}},
{0x19,0x1,{0x00}},
{0x1A,0x1,{0x00}},
{0x1B,0x1,{0x00}},
{0x1C,0x1,{0x00}},
{0x1D,0x1,{0x00}},
{0x20,0x1,{0x01}},
{0x21,0x1,{0x23}},
{0x22,0x1,{0x45}},
{0x23,0x1,{0x67}},
{0x24,0x1,{0x01}},
{0x25,0x1,{0x23}},
{0x26,0x1,{0x45}},
{0x27,0x1,{0x67}},
{0x30,0x1,{0x01}},
{0x31,0x1,{0x11}},
{0x32,0x1,{0x00}},
{0x33,0x1,{0x22}},
{0x34,0x1,{0x22}},
{0x35,0x1,{0xBB}},
{0x36,0x1,{0xCA}},
{0x37,0x1,{0xDD}},
{0x38,0x1,{0xAC}},
{0x39,0x1,{0x66}},
{0x3A,0x1,{0x77}},
{0x3B,0x1,{0x22}},
{0x3C,0x1,{0x22}},
{0x3D,0x1,{0x22}},
{0x3E,0x1,{0x22}},
{0x3F,0x1,{0x22}},
{0x40,0x1,{0x22}},
{0x52,0x1,{0x10}}, //Gout_VGLO_Sleep out
{0x53,0x1,{0x10}}, //Gout_VGLO_DSP
//****************************************************************************//
//****************************** Page 7 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x07}}, // Change to Page 7
{0x18,0x1,{0x1D}}, //ENABLE VREG
{0x02,0x1,{0x77}},
{0x17,0x1,{0x22}}, //
{0xE1,0x1,{0x79}}, //
{0x06,0x1,{0x13}}, //
//****************************************************************************//
//****************************** Page 0 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x00}}, // Change to Page 0
{0x3A,0x1,{0x55}},
//{0x11,0x1,{0x00}}, // Sleep-Out
//{0x29,0x1,{0x00}}, // Display On
//{0x29,0x1,0x{0x00}}, // Display On
{REGFLAG_DELAY, 120, {}},
{0x29, 1, {0x00}},
#endif
#if 0
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x01}}, // Change to Page 1
{0x08,0x1,{0x10}}, // output SDA
{0x21,0x1,{0x01}}, // DE = 1 Active
{0x30,0x1,{0x01}}, // 480 X 854
{0x31,0x1,{0x00}}, // COLUMN Inversion
{0x40,0x1,{0x16}}, // DDVDH/DDVDL 2.5/-3VCI
{0x41,0x1,{0x33}}, // DDVDH & DDVDL CLAMP 5.2V
{0x42,0x1,{0x02}}, // VGH/VGL 2DDVDH-DDVDL/DDVDL+VCL -VCIP
{0x43,0x1,{0x09}}, // VGH CLAMP 15V
{0x44,0x1,{0x06}}, // VGL CLAMP -10V
{0x50,0x1,{0x78}}, // VREG1 4.5V
{0x51,0x1,{0x78}}, // VREG2 -4.5 V
{0x52,0x1,{0x00}}, //Vcom
{0x53,0x1,{0x3f}}, //Vcom
{0x57,0x1,{0x50}}, //LVD
{0x60,0x1,{0x07}}, // SDTI
{0x61,0x1,{0x00}}, // CRTI
{0x62,0x1,{0x09}}, // EQTI
{0x63,0x1,{0x00}}, // PCTI
//++++++++++++++++++ Gamma Setting ++++++++++++++++++//
{0xA0,0x1,{0x00}}, // Gamma 255
{0xA1,0x1,{0x15}}, // Gamma 251
{0xA2,0x1,{0x20}}, // Gamma 247 ?D?áá
{0xA3,0x1,{0x0B}}, // Gamma 239 0B
{0xA4,0x1,{0x03}}, // Gamma 231
{0xA5,0x1,{0x10}}, // Gamma 203 ?D?áá
{0xA6,0x1,{0x07}}, // Gamma 175
{0xA7,0x1,{0x04}}, // Gamma 147
{0xA8,0x1,{0x06}}, // Gamma 108 ?′ó?áá
{0xA9,0x1,{0x0A}}, // Gamma 80
{0xAA,0x1,{0x09}}, // Gamma 52
{0xAB,0x1,{0x06}}, // Gamma 24
{0xAC,0x1,{0x04}}, // Gamma 16
{0xAD,0x1,{0x14}}, // Gamma 8 ?′ó?áá
{0xAE,0x1,{0x0C}}, // Gamma 4
{0xAF,0x1,{0x00}}, // Gamma 0
///==============Negative
{0xC0,0x1,{0x00}}, // Gamma 255
{0xC1,0x1,{0x1A}}, // Gamma 251
{0xC2,0x1,{0x20}}, // Gamma 247
{0xC3,0x1,{0x0B}}, // Gamma 239 0B
{0xC4,0x1,{0x04}}, // Gamma 231
{0xC5,0x1,{0x07}}, // Gamma 203
{0xC6,0x1,{0x06}}, // Gamma 175
{0xC7,0x1,{0x07}}, // Gamma 147
{0xC8,0x1,{0x06}}, // Gamma 108
{0xC9,0x1,{0x0B}}, // Gamma 80
{0xCA,0x1,{0x13}}, // Gamma 52
{0xCB,0x1,{0x05}}, // Gamma 24
{0xCC,0x1,{0x14}}, // Gamma 16
{0xCD,0x1,{0x15}}, // Gamma 8
{0xCE,0x1,{0x0C}}, // Gamma 4
{0xCF,0x1,{0x00}}, // Gamma 0
//****************************************************************************//
//****************************** Page 6 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x06}}, // Change to Page 6
{0x00,0x1,{0x21}},
{0x01,0x1,{0x09}},
{0x02,0x1,{0x00}},
{0x03,0x1,{0x00}},
{0x04,0x1,{0x01}},
{0x05,0x1,{0x01}},
{0x06,0x1,{0x80}},
{0x07,0x1,{0x05}},
{0x08,0x1,{0x02}},
{0x09,0x1,{0x00}},
{0x0A,0x1,{0x00}},
{0x0B,0x1,{0x00}},
{0x0C,0x1,{0x01}},
{0x0D,0x1,{0x01}},
{0x0E,0x1,{0x00}},
{0x0F,0x1,{0x00}},
{0x10,0x1,{0xE0}},
{0x11,0x1,{0xE0}},
{0x12,0x1,{0x00}},
{0x13,0x1,{0x00}},
{0x14,0x1,{0x00}},
{0x15,0x1,{0xC0}},
{0x16,0x1,{0x08}},
{0x17,0x1,{0x00}},
{0x18,0x1,{0x00}},
{0x19,0x1,{0x00}},
{0x1A,0x1,{0x00}},
{0x1B,0x1,{0x00}},
{0x1C,0x1,{0x00}},
{0x1D,0x1,{0x00}},
{0x20,0x1,{0x01}},
{0x21,0x1,{0x23}},
{0x22,0x1,{0x45}},
{0x23,0x1,{0x67}},
{0x24,0x1,{0x01}},
{0x25,0x1,{0x23}},
{0x26,0x1,{0x45}},
{0x27,0x1,{0x67}},
{0x30,0x1,{0x01}},
{0x31,0x1,{0x11}},
{0x32,0x1,{0x00}},
{0x33,0x1,{0x22}},
{0x34,0x1,{0x22}},
{0x35,0x1,{0xBB}},
{0x36,0x1,{0xCA}},
{0x37,0x1,{0xDD}},
{0x38,0x1,{0xAC}},
{0x39,0x1,{0x66}},
{0x3A,0x1,{0x77}},
{0x3B,0x1,{0x22}},
{0x3C,0x1,{0x22}},
{0x3D,0x1,{0x22}},
{0x3E,0x1,{0x22}},
{0x3F,0x1,{0x22}},
{0x40,0x1,{0x22}},
{0x52,0x1,{0x10}}, //Gout_VGLO_Sleep out
{0x53,0x1,{0x10}}, //Gout_VGLO_DSP
//****************************************************************************//
//****************************** Page 7 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x07}}, // Change to Page 7
{0x18,0x1,{0x1D}}, //ENABLE VREG
{0x02,0x1,{0x77}},
{0x17,0x1,{0x22}}, //
{0xE1,0x1,{0x79}}, //
{0x06,0x1,{0x13}}, //
//****************************************************************************//
//****************************** Page 0 Command ******************************//
//****************************************************************************//
{0xFF,0x5,{0xFF,0x98,0x06,0x04,0x00}}, // Change to Page 0
{0x3A,0x1,{0x77}},
{0x11,0x1,{0x00}}, // Sleep-Out
{REGFLAG_DELAY, 120, {}},
{0x29,0x1,{0x00}}, // Display On
//{0x11,0x1,0x{0x00}}, // Sleep-Out
{REGFLAG_DELAY, 50, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
#endif
//****************************************************************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x01}}, // Change to Page 1
{0x08, 1, {0x10}}, // output SDA
{0x21, 1, {0x01}}, // DE = 1 Active
{0x30, 1, {0x01}}, // 480 X 800
{0x31, 1, {0x00}}, // Column Inversion
{0x60, 1, {0x07}}, // SDTI
{0x61, 1, {0x00}}, // CRTI
{0x62, 1, {0x07}}, // EQTI
{0x63, 1, {0x00}}, // PCTI
{0x40, 1, {0x15}}, // BT
{0x41, 1, {0x33}}, // DDVDH/DDVDL 77
{0x42, 1, {0x02}}, // VGH/VGL 12
{0x43, 1, {0x09}}, // VGH_CP_OFF
{0x44, 1, {0x09}}, // VGL_CP_OFF
//{0x40, 1, {0x15}}, // BT
//
//{0x41, 1, {0x33}}, // DDVDH/DDVDL
//
//{0x42, 1, {0x02}}, // VGH/VGL
//
//{0x43, 1, {0x09}}, // VGH_CP_OFF
//
//{0x44, 1, {0x09}}, // VGL_CP_OFF
//
{0x50, 1, {0x78}}, // VGMP
{0x51, 1, {0x78}}, // VGMN
{0x52, 1, {0x00}}, //Flicker
{0x53, 1, {0x35}}, //Flicker4F
//++++++++++++++++++ Gamma Setting ++++++++++++++++++//
{0xA0, 1, {0x00}}, // Gamma 0 /255
{0xA1, 1, {0x06}}, // Gamma 4 /251
{0xA2, 1, {0x0B}}, // Gamma 8 /247
{0xA3, 1, {0x09}}, // Gamma 16 /239
{0xA4, 1, {0x03}}, // Gamma 24 /231
{0xA5, 1, {0x06}}, // Gamma 52 / 203
{0xA6, 1, {0x07}}, // Gamma 80 / 175
{0xA7, 1, {0x04}}, // Gamma 108 /147
{0xA8, 1, {0x08}}, // Gamma 147 /108
{0xA9, 1, {0x0C}}, // Gamma 175 / 80
{0xAA, 1, {0x15}}, // Gamma 203 / 52
{0xAB, 1, {0x09}}, // Gamma 231 / 24
{0xAC, 1, {0x0F}}, // Gamma 239 / 16
{0xAD, 1, {0x1F}}, // Gamma 247 / 8
{0xAE, 1, {0x15}}, // Gamma 251 / 4
{0xAF, 1, {0x00}}, // Gamma 255 / 0
///==============Nagitive
{0xC0, 1, {0x00}}, // Gamma 0
{0xC1, 1, {0x06}}, // Gamma 4
{0xC2, 1, {0x0B}}, // Gamma 8
{0xC3, 1, {0x09}}, // Gamma 16
{0xC4, 1, {0x03}}, // Gamma 24
{0xC5, 1, {0x05}}, // Gamma 52
{0xC6, 1, {0x06}}, // Gamma 80
{0xC7, 1, {0x04}}, // Gamma 108
{0xC8, 1, {0x08}}, // Gamma 147
{0xC9, 1, {0x0C}}, // Gamma 175
{0xCA, 1, {0x14}}, // Gamma 203
{0xCB, 1, {0x09}}, // Gamma 231
{0xCC, 1, {0x0F}}, // Gamma 239
{0xCD, 1, {0x1F}}, // Gamma 247
{0xCE, 1, {0x15}}, // Gamma 251
{0xCF, 1, {0x00}}, // Gamma 255
//****************************************************************************//
{0xFF,5,{0xFF,0x98,0x06,0x04,0x06}}, // Change to Page 6
{0x00, 1, {0x20}},
{0x01, 1, {0x05}},
{0x02, 1, {0x00}},
{0x03, 1, {0x00}},
{0x04, 1, {0x01}},
{0x05, 1, {0x01}},
{0x06, 1, {0x88}},
{0x07, 1, {0x04}},
{0x08, 1, {0x01}},
{0x09, 1, {0x90}},
{0x0A, 1, {0x03}},
{0x0B, 1, {0x01}},
{0x0C, 1, {0x01}},
{0x0D, 1, {0x01}},
{0x0E, 1, {0x00}},
{0x0F, 1, {0x00}},
{0x10, 1, {0x55}},
{0x11, 1, {0x53}},
{0x12, 1, {0x01}},
{0x13, 1, {0x0D}},
{0x14, 1, {0x0D}},
{0x15, 1, {0x43}},
{0x16, 1, {0x0B}},
{0x17, 1, {0x00}},
{0x18, 1, {0x00}},
{0x19, 1, {0x00}},
{0x1A, 1, {0x00}},
{0x1B, 1, {0x00}},
{0x1C, 1, {0x00}},
{0x1D, 1, {0x00}},
{0x20, 1, {0x01}},
{0x21, 1, {0x23}},
{0x22, 1, {0x45}},
{0x23, 1, {0x67}},
{0x24, 1, {0x01}},
{0x25, 1, {0x23}},
{0x26, 1, {0x45}},
{0x27, 1, {0x67}},
{0x30, 1, {0x02}},
{0x31, 1, {0x22}},
{0x32, 1, {0x11}},
{0x33, 1, {0xAA}},
{0x34, 1, {0xBB}},
{0x35, 1, {0x66}},
{0x36, 1, {0x00}},
{0x37, 1, {0x22}},
{0x38, 1, {0x22}},
{0x39, 1, {0x22}},
{0x3A, 1, {0x22}},
{0x3B, 1, {0x22}},
{0x3C, 1, {0x22}},
{0x3D, 1, {0x22}},
{0x3E, 1, {0x22}},
{0x3F, 1, {0x22}},
{0x40, 1, {0x22}},
//****************************************************************
// Page 5 Command
{0xFF, 5, {0xFF,0x98,0x06,0x04,0x05}},
{0x09, 1, {0xFC}},
{0x07, 1, {0xBC}},
//****************************************************************
{0xFF, 5, {0xFF,0x98,0x06,0x04,0x00}},
{0x11,1,{0x00}}, // Sleep-Out
{REGFLAG_DELAY, 120, {}},
{0x29,1,{0x00}}, // Display On
//{0x11,0x1,0x{0x00}}, // Sleep-Out
{REGFLAG_DELAY, 50, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_sleep_out_setting[] = {
{0x11, 1, {0x00}},
{REGFLAG_DELAY, 120, {}},
{0x29, 1, {0x00}},
{REGFLAG_DELAY, 20, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_sleep_In_setting[] = {
{0x28, 1, {0x00}},
{REGFLAG_DELAY, 40, {}},
{0x10, 1, {0x00}},
{REGFLAG_DELAY, 120, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
{
unsigned int i;
for(i = 0; i < count; i++) {
unsigned cmd;
cmd = table.cmd;
switch (cmd) {
case REGFLAG_DELAY :
MDELAY(table.count);
break;
case REGFLAG_END_OF_TABLE :
break;
default:
dsi_set_cmdq_V2(cmd, table.count, table.para_list, force_update);
}
}
}
// ---------------------------------------------------------------------------
// LCM Driver Implementations
// ---------------------------------------------------------------------------
static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
{
memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
}
static void lcm_get_params(LCM_PARAMS *params)
{
memset(params, 0, sizeof(LCM_PARAMS));
params->type = LCM_TYPE_DSI;
params->width = FRAME_WIDTH;
params->height = FRAME_HEIGHT;
#if (LCM_DSI_CMD_MODE)
params->dsi.mode = CMD_MODE;
params->dsi.switch_mode = SYNC_EVENT_VDO_MODE;
#else
params->dsi.mode = SYNC_PULSE_VDO_MODE;
// params->dsi.switch_mode = CMD_MODE;
#endif
// params->dsi.switch_mode_enable = 0;
// DSI
/* Command mode setting */
params->dsi.LANE_NUM = LCM_TWO_LANE;
//The following defined the fomat for data coming from LCD engine.
params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
params->dsi.data_format.