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有在82上面调试过Hynix 的H9TP32A4GDMCPR_KDM EMMC

时间:10-02 整理:3721RD 点击:
请问有在82平台上调试过H9TP32A4GDMCPR_KDM EMMC FLASH吗?在memoryDevicelist_MT6582.xls中没有这个FLASH,有调试的同学请支持一下,如果没有,需要怎 样加入到MemoryDevicelist_MT6582.xls中呢、

可以下载了,从里面Copy一个出来,把ID填上去就可以了

稳定性呢,复制的和你用的参数有些不一样吧。

恩,有个问题,目前不开机,开机到BL 就掉电了,还在看

换另外的Flash也一样不开机,我都看了MemoryDeviceListp_MTXXX.xls文件中的后面的参数大多都相同,ID不一样

不能开机?有什么LOG?
你的电池ID PIN 有没有接地?

我也没调式过

路过,学习一下!

从打印LOG来看,LOG只能打出开机部分,ait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 265078Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=0 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
PMIC_WRAP]wrap_init pass,the return value=0.
[pmic6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0x2023
pl pmic powerkey Press
[pmic6323_init] powerKey = 1
[pmic6323_init] is USB in = 0xB004
pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
BLDR] Build Time: 20140520-150901
[DDR Reserve] ddr reserve mode not be enabled yet
RGU rgu_release_rg_dramc_conf_iso:MTK_WDT_DEBUG_CTL(590200F1)
RGU rgu_release_rg_dramc_iso:MTK_WDT_DEBUG_CTL(590200F1)
RGU rgu_release_rg_dramc_sref:MTK_WDT_DEBUG_CTL(590200F1)
DDR is in self-refresh. 200F1
DDR is in self-refresh. 200F1
DDR is in self-refresh. 200F1
==== Dump RGU Reg ========
RGU MODE:     4D
RGU LENGTH:   FFE0
RGU STA:      0
RGU INTERVAL: FFF
RGU SWSYSRST: 0
==== Dump RGU Reg End ====
RGU: g_rgu_satus:0
mtk_wdt_mode_config  mode value=10, tmp:22000010
PL P ON
WDT does not trigger reboot
mtk_wdt_mode_config  mode value=5D, tmp:2200005D
RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(590200F3)
kpd read addr: 0x0040: data:0x4005
Enter mtk_kpd_gpio_set!
kpd debug column : -2147483573, 0, -2147483480, 0, 0, 0, 0, 0
kpd debug row : -2147483574, 0, 0, 0, 0, 0, 0, 0
after set KP enable: KP_SEL = 0x0 !
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=3967
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0x9, con = 0x427
[RTC] powerkey1 = 0xA357, powerkey2 = 0x67D2
Writeif_unlock
[RTC] RTC_SPAR0=0x40
rtc_2sec_reboot_check cali=2304
rtc_2sec_stat_clear
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x40, spar1 = 0x800
[RTC] new_spare0 = 0x0, new_spare1 = 0x1, new_spare2 = 0x1, new_spare3 = 0x1
[RTC] bbpu = 0x9, con = 0x426, cali = 0x100
pl pmic powerkey Press
power key is pressed
Battery exist
[0xE]=0x5
[PLFM] Power key boot!
[RTC] rtc_bbpu_power_on done
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) div(193) DS(0) RS(0)
[SD0] Switch to High-Speed mode!
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(2) DDR(1) div(96) DS(0) RS(0)
[SD0] Bus Width: 8
[SD0] Size: 3696 MB, Max.Speed: 52000 kHz, blklen(512), nblks(7569408), ro(0)
[SD0] Initialized
[SD0] SET_CLK(52000kHz): SCLK(50000kHz) MODE(2) DDR(1) div(0) DS(0) RS(0)
msdc_ett_offline_to_pl: size<2> m_id<0x90>
msdc <0> <HYNIX > <H4G1d>
msdc <1> <xxxxxx> <H4G1d>
msdc failed to find
EMI] mcp_dram_num:1,discrete_dram_num:0,enable_combo_dis:0
found:1,i:0
[EMI] LPDDR2
[EMI] eMMC/NAND ID = 90,1,4A,48,34,47,31,64,4,1,0,CD,28,24,CF,49
[EMI] MDL number = 0
[EMI]in init_lpddr2
Rank 0 coarse tune value selection : 14, 14
rank 0 coarse = 14
rank 0 fine = 48
10:|    0    0    0    1    1    1    1    0    0
opt_dle value:6
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
Rank 0 coarse tune value selection : 14, 14
byte:0, (DQS,DQ)=(8,A)
byte:1, (DQS,DQ)=(8,9)
byte:2, (DQS,DQ)=(8,A)
byte:3, (DQS,DQ)=(8,9)
[EMI] DRAMC calibration passed
MEM] complex R/W mem test pass
RGU rgu_dram_reserved:MTK_WDT_MODE(220000DD)
0:dram_rank_size:20000000
[Dram_Buffer] dram size:536870912
[Dram_Buffer] structure size: 1650288
[Dram_Buffer] structure size2: 512
[PLFM] Init Boot Device: OK(0)
============func=load_pt_from_fixed_addr===scan pmt from 00000000E7500000=====
find pt at 00000000E7500000
part PRELOADER size 0000000000000000 0000000000600000
part MBR size 0000000000600000 0000000000080000
part EBR1 size 0000000000680000 0000000000080000
part PRO_INFO size 0000000000700000 0000000000300000
part NVRAM size 0000000000A00000 0000000000500000
part PROTECT_F size 0000000000F00000 0000000000A00000
part PROTECT_S size 0000000001900000 0000000000A00000
part SECCFG size 0000000002300000 0000000000020000
part UBOOT size 0000000002320000 0000000000060000
part BOOTIMG size 0000000002380000 0000000000600000
part RECOVERY size 0000000002980000 0000000000600000
part SEC_RO size 0000000002F80000 0000000000600000
part MISC size 0000000003580000 0000000000080000
part LOGO size 0000000003600000 0000000000300000
part EXPDB size 0000000003900000 0000000000A00000
part ANDROID size 0000000004300000 000000002BC00000
part CACHE size 000000002FF00000 0000000007E00000
part USRDATA size 0000000037D00000 00000000AE400000
part BMTPOOL size 00000000FFFF00A8 0000000001500000
[PART] blksz: 512B
[PART] [0x0000000000000000-0x00000000013FFFFF] "PRELOADER" (40960 blocks)
[PART] [0x0000000001400000-0x000000000147FFFF] "MBR" (1024 blocks)
[PART] [0x0000000001480000-0x00000000014FFFFF] "EBR1" (1024 blocks)
[PART] [0x0000000001500000-0x00000000017FFFFF] "PRO_INFO" (6144 blocks)
[PART] [0x0000000001800000-0x0000000001CFFFFF] "NVRAM" (10240 blocks)
[PART] [0x0000000001D00000-0x00000000026FFFFF] "PROTECT_F" (20480 blocks)
[PART] [0x0000000002700000-0x00000000030FFFFF] "PROTECT_S" (20480 blocks)
[PART] [0x0000000003100000-0x000000000311FFFF] "SECURE" (256 blocks)
[PART] [0x0000000003120000-0x000000000317FFFF] "UBOOT" (768 blocks)
[PART] [0x0000000003180000-0x000000000377FFFF] "BOOTIMG" (12288 blocks)
[PART] [0x0000000003780000-0x0000000003D7FFFF] "RECOVERY" (12288 blocks)
[PART] [0x0000000003D80000-0x000000000437FFFF] "SECSTATIC" (12288 blocks)
[PART] [0x0000000004380000-0x00000000043FFFFF] "MISC" (1024 blocks)
[PART] [0x0000000004400000-0x00000000046FFFFF] "LOGO" (6144 blocks)
[PART] [0x0000000004700000-0x00000000050FFFFF] "EXPDB" (20480 blocks)
[PART] [0x0000000005100000-0x0000000030CFFFFF] "ANDSYSIMG" (1433600 blocks)
[PART] [0x0000000030D00000-0x0000000038AFFFFF] "CACHE" (258048 blocks)
[PART] [0x0000000038B00000-0x0000000078AFFFFF] "USER" (2097152 blocks)
[ROM_INFO] 'v2','0x3100000','0x20000','0x3D80000','0x2C00'
[SEC_K] SML KEY AC = 0
[SEC_K] SBC_PUBK Found
[SEC] AES Legacy : 0
[SEC] SECCFG AC : 1
SEC] read '0x3100000'
0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0,
[LIB] SecLib.a '20130607-160347'
[LIB] CFG read size '0x4000' '0x1860'
[LIB] Name =
[LIB] Config = 0x22, 0x22
0x31,0x41,0x35,0x35
[LIB] seccfg magic is incorrect
[platform_vusb_on] PASS
[TOOL] PMIC not dectect usb cable!
[TOOL] <UART> wait sync time 150ms->5ms
[TOOL] <UART> receieved data: ()
[PART] Image with part header
[PART] name : LK
[PART] addr : FFFFFFFFh
[PART] size : 268712
[PART] magic: 58881688h
[PART] load "UBOOT" from 0x0000000002320200 (dev) to 0x81E00000 (mem) [SUCCESS]
[PART] load speed: 10933KB/s, 268712 bytes, 24ms
Battery exist
[0xE]=0x5
[SECRO] Don't read
[AUTHEN] rsa.N length = 1024 bytes
[AUTHEN] rsa.E length = 20 bytes
[LIB] NS-CHIP
[SBC] Don't check
Device APC domain init setup:
0:dram_rank_size:20000000
[PLFM] md_type[0] = 104
[PLFM] md_type[1] = 0
[PLFM] boot reason: 0
[PLFM] boot mode: 0
[PLFM] META COM0: 0
[PLFM] <0x9FB76610>: 0x0
[PLFM] boot time: 435ms
[PLFM] DDR reserve mode: enable = 0, success = 0
[BLDR] jump to 0x81E00000
[BLDR] <0x81E00000>=0xEA000007
[BLDR] <0x81E00004>=0xEA006315

搞定,开起来了,
int force_get_tbat(void)
{
        return 25;
}

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