hyperlynx仿真，一个入门问题！怎么实现总线多信号的仿真啊？

好像不能进行总线仿真

Major product features
• Industry-renowned ease of use,
enabling shorter time to results
• Accurate modeling of trace
impedance, coupling, and
frequency-dependent losses
• Sweep different values for
discretes, trace geometries and
lengths, and driver settings
• Terminator wizard recommends
optimal termination strategies
• Integrated timing analysis for
DDR, DDR2, and DDR3
• Industry-leading SERDES support
including fast eye diagram analysis,
S-parameter simulation, and BER
prediction
• Advanced, exploratory via
modeling
• Provides an early look at likely
EMC failures
• Integration with the constraint
editing system
• Works with all major PCB layout
and routing applications


看看最新版的吧 已经支持DDR1 DDR2 DDR3的时序分析了！