ucOS学习笔记(6)——一步一步移植ucOS到STM32

今天早上开始写了几个基本的设备驱动，同时编写了两个简单的测试任务。其间出现几个问题。
第一个问题是代码编译能通过，但是下载到板子上就是跑不动，根本运行不到main函数，估计是初始化系统部分存在一些问题，我也没有深入研究直接将stm32官方的stm32f10x_vector.s和现在的init.s整合得到以下的系统初始化代码，该代码能够保证测试任务LED流水灯正常运行。
; If you need to use external SRAM mounted on STM3210E-EVAL board as data memory,
; change the following define value to 1 (or choose ENABLE in Configuration Wizard window)
;// External SRAM Configuration <0=> DISABLE <1=> ENABLE
DATA_IN_ExtSRAM EQU 0

; Amount of memory (in bytes) allocated for Stack
; Tailor this value to your application needs
;// Stack Configuration
;// Stack Size (in Bytes) <0x0-0xFFFFFFFF:8>
;//
Stack_Size EQU 0x00000400

AREA STACK, NOINIT, READWRITE, ALIGN=3
Stack_Mem SPACE Stack_Size

__initial_sp
; If you need to use external SRAM mounted on STM3210E-EVAL board as data memory
; and internal SRAM for Stack, uncomment the following line and comment the line above
;__initial_sp EQU 0x20000000 + Stack_Size ; "Use MicroLIB" must be checked in
; the Project->Options->Target window

; Amount of memory (in bytes) allocated for Heap
; Tailor this value to your application needs
;// Heap Configuration
;// Heap Size (in Bytes) <0x0-0xFFFFFFFF:8>
;//

Heap_Size EQU 0x00000100

AREA HEAP, NOINIT, READWRITE, ALIGN=3
__heap_base
Heap_Mem SPACE Heap_Size
__heap_limit

THUMB
PRESERVE8

; Import exceptions handlers
IMPORT OS_CPU_SysTickHandler
IMPORT OS_CPU_PendSVHandler

;*******************************************************************************
; Fill-up the Vector Table entries with the exceptions ISR address
;*******************************************************************************
AREA RESET, DATA, READONLY
EXPORT __Vectors

__Vectors
DCD __initial_sp ; 0, SP start value.
DCD Reset_Handler ; 1, PC start value.
DCD App_NMI_ISR ; 2, NMI
DCD App_Fault_ISR ; 3, Hard Fault
DCD App_Spurious_ISR ; 4, Memory Management
DCD App_Spurious_ISR ; 5, Bus Fault
DCD App_Spurious_ISR ; 6, Usage Fault
DCD 0 ; 7, Reserved
DCD 0 ; 8, Reserved
DCD 0 ; 9, Reserved
DCD 0 ; 10, Reserved
DCD App_Spurious_ISR ; 11, SVCall
DCD App_Spurious_ISR ; 12, Debug Monitor
DCD App_Spurious_ISR ; 13, Reserved
DCD OS_CPU_PendSVHandler ; 14, PendSV Handler
DCD OS_CPU_SysTickHandler ; 15, uC/OS-II Tick ISR Handler
DCD App_Spurious_ISR ; 16, INTISR[ 0], Window Watchdog
DCD App_Spurious_ISR ; 17, INTISR[ 1] PVD through EXTI Line Detection
DCD App_Spurious_ISR ; 18, INTISR[ 2] Tamper Interrupt
DCD App_Spurious_ISR ; 19, INTISR[ 3] RTC Global Interrupt
DCD App_Spurious_ISR ; 20, INTISR[ 4] FLASH Global Interrupt
DCD App_Spurious_ISR ; 21, INTISR[ 5] RCC Global Interrupt
DCD App_Spurious_ISR ; 22, INTISR[ 6] EXTI Line0 Interrupt
DCD App_Spurious_ISR ; 23, INTISR[ 7] EXTI Line1 Interrupt
DCD App_Spurious_ISR ; 24, INTISR[ 8] EXTI Line2 Interrupt
DCD App_Spurious_ISR ; 25, INTISR[ 9] EXTI Line3 Interrupt
DCD App_Spurious_ISR ; 26, INTISR[ 10] EXTI Line4 Interrupt
DCD App_Spurious_ISR ; 27, INTISR[ 11] DMA Channel1 Global Interrupt
DCD App_Spurious_ISR ; 28, INTISR[ 12] DMA Channel2 Global Interrupt
DCD App_Spurious_ISR ; 29, INTISR[ 13] DMA Channel3 Global Interrupt
DCD App_Spurious_ISR ; 30, INTISR[ 14] DMA Channel4 Global Interrupt
DCD App_Spurious_ISR ; 31, INTISR[ 15] DMA Channel5 Global Interrupt
DCD App_Spurious_ISR ; 32, INTISR[ 16] DMA Channel6 Global Interrupt
DCD App_Spurious_ISR ; 33, INTISR[ 17] DMA Channel7 Global Interrupt
DCD App_Spurious_ISR ; 34, INTISR[ 18] ADC Global Interrupt
DCD App_Spurious_ISR ; 35, INTISR[ 19] USB High Priority / CAN TX Interrupts
DCD App_Spurious_ISR ; 36, INTISR[ 20] USB Low Priority / CAN RX0 Interrupts
DCD App_Spurious_ISR ; 37, INTISR[ 21] CAN RX1 Interrupt
DCD App_Spurious_ISR ; 38, INTISR[ 22] CAN SCE Interrupt
DCD App_Spurious_ISR ; 39, INTISR[ 23] EXTI Line[9:5] Interrupt
DCD App_Spurious_ISR ; 40, INTISR[ 24] TIM1 Break Interrupt
DCD App_Spurious_ISR ; 41, INTISR[ 25] TIM1 Update Interrupt
DCD App_Spurious_ISR ; 42, INTISR[ 26] TIM1 Trigger & Commutation Interrupts
DCD App_Spurious_ISR ; 43, INTISR[ 27] TIM2 Global Interrupt
DCD App_Spurious_ISR ; 44, INTISR[ 28] TIM3 Global Interrupt
DCD App_Spurious_ISR ; 45, INTISR[ 29] TIM4 Global Interrupt
DCD App_Spurious_ISR ; 46, INTISR[ 30] I2C1 Event Interrupt
DCD App_Spurious_ISR ; 47, INTISR[ 31] I2C1 Error Interrupt
DCD App_Spurious_ISR ; 48, INTISR[ 32] I2C2 Event Interrupt
DCD App_Spurious_ISR ; 49, INTISR[ 33] I2C2 Error Interrupt
DCD App_Spurious_ISR ; 50, INTISR[ 34] SPI1 Global Interrupt
DCD App_Spurious_ISR ; 51, INTISR[ 35] SPI2 Global Interrupt
DCD App_Spurious_ISR ; 52, INTISR[ 36] USART1 Global Interrupt
DCD App_Spurious_ISR ; 53, INTISR[ 37] USART2 Global Interrupt
DCD App_Spurious_ISR ; 54, INTISR[ 38] USART3 Global Interrupt
DCD App_Spurious_ISR ; 55, INTISR[ 39] EXTI Line [15:10] Interrupts
DCD App_Spurious_ISR ; 56, INTISR[ 40] RTC Al