Eclipse开发调试ARM裸机程序(七)sd卡读写

interrupt?// {// for(i=(status & 0x7f)/4;i>0;i--)// {// *Rx_buffer++=SDIDAT;// rd_cnt++;// }// SDIFSTA=SDIFSTA&0x200; //Clear Rx FIFO Last data Ready, YH 040221// }// else if( (status&0x80) == 0x80 ) // Check Half interrupt?// {// for(i=0;i<8;i++)// {// *Rx_buffer++=SDIDAT;// rd_cnt++;// }// }//// ClearPending(BIT_SDI);//}//void __irq Wt_Int(void)//{// ClearPending(BIT_SDI);//// SDIDAT=*Tx_buffer++;// wt_cnt++;//// if(wt_cnt==128*block)// {// rINTMSK |= BIT_SDI;// SDIDAT=*Tx_buffer;// TR_end=1;// }//}////void __irq DMA_end(void)//{// ClearPending(BIT_DMA0);//// TR_end=1;//}void Rd_Block(void){U32 mode;int status;rd_cnt=0; //Uart_Printf("Block read test[ Polling read ]\n");mode = 0 ;SDIFSTA=SDIFSTA|(1<16); // FIFO resetif(mode!=2)SDIDCON=(2<22)|(1<19)|(1<17)|(Wide<16)|(1<14)|(2<12)|(block<0); //YH 040220SDICARG=0x0; // CMD17/18(addr)RERDCMD:switch(mode){case POL:if(block<2) // SINGLE_READ{SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 17); // sht_resp, wait_resp, dat, start, CMD17if(!Chk_CMDend(17, 1)) //-- Check end of CMD17goto RERDCMD; }else // MULTI_READ{SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 18); // sht_resp, wait_resp, dat, start, CMD18if(!Chk_CMDend(18, 1)) //-- Check end of CMD18 goto RERDCMD;}SDICSTA=0xa00; // Clear cmd_end(with rsp)while(rd_cnt<128*block) // 512*block bytes{if((SDIDSTA&0x20)==0x20) // Check timeout{SDIDSTA=(0x1<0x5); // Clear timeout flagbreak;}status=SDIFSTA;if((status&0x1000)==0x1000) // Is Rx data?{*Rx_buffer++=SDIDAT;rd_cnt++;}}break;// case INT:// pISR_SDI=(unsigned)Rd_Int;// rINTMSK = ~(BIT_SDI);//// rSDIIMSK=5; // Last & Rx FIFO half int.//// if(block<2) // SINGLE_READ// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 17); // sht_resp, wait_resp, dat, start, CMD17// if(!Chk_CMDend(17, 1)) //-- Check end of CMD17// goto RERDCMD;// }// else // MULTI_READ// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 18); // sht_resp, wait_resp, dat, start, CMD18// if(!Chk_CMDend(18, 1)) //-- Check end of CMD18// goto RERDCMD;// }//// SDICSTA=0xa00; // Clear cmd_end(with rsp)//// while(rd_cnt<128*block);//// rINTMSK |= (BIT_SDI);// rSDIIMSK=0; // All mask// break;//// case DMA:// pISR_DMA0=(unsigned)DMA_end;// rINTMSK = ~(BIT_DMA0);// SDIDCON=SDIDCON|(1<24); //YH 040227, Burst4 Enable//// rDISRC0=(int)(SDIDAT); // SDIDAT// rDISRCC0=(1<1)+(1<0); // APB, fix// rDIDST0=(U32)(Rx_buffer); // Rx_buffer// rDIDSTC0=(0<1)+(0<0); // AHB, inc// rDCON0=(1<31)+(0<30)+(1<29)+(0<28)+(0<27)+(2<24)+(1<23)+(1<22)+(2<20)+128*block;//// rDMASKTRIG0=(0<2)+(1<1)+0; //no-stop, DMA2 channel on, no-sw trigger//// SDIDCON=(2<22)|(1<19)|(1<17)|(Wide<16)|(1<15)|(1<14)|(2<12)|(block<0);// if(block<2) // SINGLE_READ// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 17); // sht_resp, wait_resp, dat, start, CMD17// if(!Chk_CMDend(17, 1)) //-- Check end of CMD17// goto RERDCMD;// }// else // MULTI_READ// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 18); // sht_resp, wait_resp, dat, start, CMD18// if(!Chk_CMDend(18, 1)) //-- Check end of CMD18// goto RERDCMD;// }//// SDICSTA=0xa00; // Clear cmd_end(with rsp)// while(!TR_end);// ////Uart_Printf("SDIFSTA=0x%x\n",SDIFSTA);// rINTMSK |= (BIT_DMA0);// TR_end=0;// rDMASKTRIG0=(1<2); //DMA0 stop// break;default:break;}//-- Check end of DATAif(!Chk_DATend()) //Uart_Printf("dat error\n");SDIDCON=SDIDCON&~(7<12);SDIFSTA=SDIFSTA&0x200; //Clear Rx FIFO Last data Ready, YH 040221SDIDSTA=0x10; // Clear data Tx/Rx end detectif(block>1){RERCMD12: //--Stop cmd(CMD12)SDICARG=0x0; //CMD12(stuff bit)SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 12);//sht_resp, wait_resp, start, CMD12//-- Check end of CMD12if(!Chk_CMDend(12, 1)) goto RERCMD12;SDICSTA=0xa00; // Clear cmd_end(with rsp)}}void Wt_Block(void){U32 mode;int status;wt_cnt=0; //Uart_Printf("Block write test[ Polling write ]\n");mode = 0 ;SDIFSTA=SDIFSTA|(1<16); //YH 040223 FIFO resetif(mode!=2)SDIDCON=(2<22)|(1<20)|(1<17)|(Wide<16)|(1<14)|(3<12)|(block<0); //YH 040220SDICARG=0x0; // CMD24/25(addr)REWTCMD:switch(mode){case POL:if(block<2) // SINGLE_WRITE{SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 24); //sht_resp, wait_resp, dat, start, CMD24if(!Chk_CMDend(24, 1)) //-- Check end of CMD24goto REWTCMD;}else // MULTI_WRITE{SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 25); //sht_resp, wait_resp, dat, start, CMD25if(!Chk_CMDend(25, 1)) //-- Check end of CMD25goto REWTCMD; }SDICSTA=0xa00; // Clear cmd_end(with rsp)while(wt_cnt<128*block){status=SDIFSTA;if((status&0x2000)==0x2000) {SDIDAT=*Tx_buffer++;wt_cnt++;////Uart_Printf("Block No.=%d, wt_cnt=%d\n",block,wt_cnt);}}break;// case INT:// pISR_SDI=(unsigned)Wt_Int;// rINTMSK = ~(BIT_SDI);//// rSDIIMSK=0x10; // Tx FIFO half int.//// if(block<2) // SINGLE_WRITE// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 24); //sht_resp, wait_resp, dat, start, CMD24// if(!Chk_CMDend(24, 1)) //-- Check end of CMD24// goto REWTCMD;// }// else // MULTI_WRITE// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 25); //sht_resp, wait_resp, dat, start, CMD25// if(!Chk_CMDend(25, 1)) //-- Check end of CMD25// goto REWTCMD;// }//// SDICSTA=0xa00; // Clear cmd_end(with rsp)//// while(!TR_end);// //while(wt_cnt<128);//// rINTMSK |= (BIT_SDI);// TR_end=0;// rSDIIMSK=0; // All mask// break;//// case DMA:// pISR_DMA0=(unsigned)DMA_end;// rINTMSK = ~(BIT_DMA0);// SDIDCON=SDIDCON|(1<24); //YH 040227, Burst4 Enable//// rDISRC0=(int)(Tx_buffer); // Tx_buffer// rDISRCC0=(0<1)+(0<0); // AHB, inc// rDIDST0=(U32)(SDIDAT); // SDIDAT// rDIDSTC0=(1<1)+(1<0); // APB, fix// rDCON0=(1<31)+(0<30)+(1<29)+(0<28)+(0<27)+(2<24)+(1<23)+(1<22)+(2<20)+128*block;// //handshake, sync PCLK, TC int, single tx, single service, SDI, H/W request,// //auto-reload off, word, 128blk*num// rDMASKTRIG0=(0<2)+(1<1)+0; //no-stop, DMA0 channel on, no-sw trigger//// SDIDCON=(2<22)|(1<20)|(1<17)|(Wide<16)|(1<15)|(1<14)|(3<12)|(block<0); //YH 040220//// // Word Tx, Tx after rsp, blk, 4bit bus, dma enable, Tx start, blk num// if(block<2) // SINGLE_WRITE// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 24); //sht_resp, wait_resp, dat, start, CMD24// if(!Chk_CMDend(24, 1)) //-- Check end of CMD24// goto REWTCMD;// }// else // MULTI_WRITE// {// SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 25); //sht_resp, wait_resp, dat, start, CMD25// if(!Chk_CMDend(25, 1)) //-- Check end of CMD25// goto REWTCMD;// }//// SDICSTA=0xa00; // Clear cmd_end(with rsp)//// while(!TR_end);//// rINTMSK |= (BIT_DMA0);// TR_end=0;// rDMASKTRIG0=(1<2); //DMA0 stop//// break;default:break;}//-- Check end of DATAif(!Chk_DATend()) //Uart_Printf("dat error\n");SDIDCON=SDIDCON&~(7<12); //YH 040220, Clear Data Transfer mode => no operation, Cleata Data Transfer startSDIDSTA=0x10; // Clear data Tx/Rx endif(block>1){//--Stop cmd(CMD12)REWCMD12: SDIDCON=(1<18)|(1<17)|(0<16)|(1<14)|(1<12)|(block<0); //YH 040220SDICARG=0x0; //CMD12(stuff bit)SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 12); //sht_resp, wait_resp, start, CMD12//-- Check end of CMD12if(!Chk_CMDend(12, 1)) goto REWCMD12;SDICSTA=0xa00; // Clear cmd_end(with rsp)//-- Check end of DATA(with busy state)if(!Chk_BUSYend()) //Uart_Printf("error\n");SDIDSTA=0x08; //! Should be cleared by writing 1.}}void Delay(volatile unsigned long dly){for(; dly > 0; dly--);}int Chk_CMDend(int cmd, int be_resp)//0: Timeout{int finish0;if(!be_resp) // No response{finish0=SDICSTA;while((finish0&0x800)!=0x800) // Check cmd endfinish0=SDICSTA;SDICSTA=finish0;// Clear cmd end statereturn 1;}else // With response{finish0=SDICSTA;while( !( ((finish0&0x200)==0x200) | ((finish0&0x400)==0x400) )) // Check cmd/rsp endfinish0=SDICSTA;if(cmd==1 | cmd==41) // CRC no check, CMD9 is a long Resp. command.{if( (finish0&0xf00) != 0xa00 ) // Check error{SDICSTA=finish0; // Clear error stateif(((finish0&0x400)==0x400))return 0; // Timeout error}SDICSTA=finish0; // Clear cmd & rsp end state}else // CRC check{if( (finish0&0x1f00) != 0xa00 ) // Check error{//Uart_Printf("CMD%d:SDICSTA=0x%x, SDIRSP0=0x%x\n",cmd, SDICSTA, SDIRSP0);SDICSTA=finish0; // Clear error stateif(((finish0&0x400)==0x400))return 0; // Timeout error}SDICSTA=finish0;}return 1;}}int Chk_DATend(void){int finish;finish=SDIDSTA;while( !( ((finish&0x10)==0x10) | ((finish&0x20)==0x20) )) // Chek timeout or data endfinish=SDIDSTA;if( (finish&0xfc) != 0x10 ){//Uart_Printf("DATA:finish=0x%x\n", finish);SDIDSTA=0xec; // Clear error statereturn 0;}return 1;}int Chk_BUSYend(void){int finish;finish=SDIDSTA;while( !( ((finish&0x08)==0x08) | ((finish&0x20)==0x20) ))finish=SDIDSTA;if( (finish&0xfc) != 0x08 ){//Uart_Printf("DATA:finish=0x%x\n", finish);SDIDSTA=0xf4; //clear error statereturn 0;}return 1;}void CMD0(void){//-- Make card idle state SDICARG=0x0; // CMD0(stuff bit)SDICCON=(1<8)|(MAGIC_NUMBER | 0); // No_resp, start, CMD0//-- Check end of CMD0Chk_CMDend(0, 0);SDICSTA=0x800; // Clear cmd_end(no rsp)}int Chk_SD_OCR(void){int i;//-- Negotiate operating condition for SD, it makes card ready statefor(i=0;i<50;i++) //If this time is short, init. can be fail.{CMD55(); // Make ACMDSDICARG=0xff8000; //ACMD41(SD OCR:2.7V~3.6V)SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 41);//sht_resp, wait_resp, start, ACMD41//-- Check end of ACMD41if( Chk_CMDend(41, 1) & SDIRSP0==0x80ff8000 ){SDICSTA=0xa00; // Clear cmd_end(with rsp)return 1; // Success }Delay(20000); // Wait Card power up status 1Sec//Delay(200); // Wait Card power up status}////Uart_Printf("SDIRSP0=0x%x\n",SDIRSP0);SDICSTA=0xa00; // Clear cmd_end(with rsp)return 0; // Fail}int CMD55(void){//--Make ACMDSDICARG=RCA<16; //CMD7(RCA,stuff bit)SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 55); //sht_resp, wait_resp, start, CMD55//-- Check end of CMD55if(!Chk_CMDend(55, 1)) return 0;SDICSTA=0xa00; // Clear cmd_end(with rsp)return 1;}int CMD13(void)//SEND_STATUS{int response0;SDICARG=RCA<16; // CMD13(RCA,stuff bit)SDICCON=(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 13); // sht_resp, wait_resp, start, CMD13//-- Check end of CMD13if(!Chk_CMDend(13, 1)) return 0;////Uart_Printf("SDIRSP0=0x%x\n", SDIRSP0);if(SDIRSP0&0x100)////Uart_Printf("Ready for Data\n");//else ////Uart_Printf("Not Ready\n");response0=SDIRSP0;response0 &= 0x3c00;response0 = response0 >> 9;////Uart_Printf("Current Status=%d\n", response0);if(response0==6)Test_SDI();SDICSTA=0xa00; // Clear cmd_end(with rsp)return 1;}int CMD9(void)//SEND_CSD{SDICARG=RCA<16; // CMD9(RCA,stuff bit)SDICCON=(0x1<10)|(0x1<9)|(0x1<8)|(MAGIC_NUMBER | 9); // long_resp, wait_resp, start, CMD9//Uart_Printf("\nCSD register :\n");//-- Check end of CMD9if(!Chk_CMDend(9, 1)) return 0;//Uart_Printf("SDIRSP0=0x%x\nSDIRSP1=0x%x\nSDIRSP2=0x%x\nSDIRSP3=0x%x\n", SDIRSP0,rSDIRSP1,rSDIRSP2,rSDIRSP3);return 1;}void Set_4bit_bus(void){Wide=1;SetBus();////Uart_Printf("\n4bit bus\n");}void SetBus(void){do{CMD55(); // Make ACMD//-- CMD6 implementSDICARG = Wide < 1; //Wide 0: 1bit, 1: 4bitSDICCON = (0x1 < 9) | (0x1 < 8) | (MAGIC_NUMBER | 6); //sht_resp, wait_resp, start, CMD55if (!Chk_CMDend(6, 1)) // ACMD6continue;SDICSTA = 0xa00; // Clear cmd_end(with rsp)} while (0);}void Set_Prt(void){//-- Set protection addr.0 ~ 262144(32*16*512) //Uart_Printf("[Set protection(addr.0 ~ 262144) test]\n");do{//--Make ACMDSDICARG = 0; // CMD28(addr)SDICCON = (0x1 < 9) | (0x1 < 8) | (MAGIC_NUMBER | 28); //sht_resp, wait_resp, start, CMD28//-- Check end of CMD28if (!Chk_CMDend(28, 1))continue;SDICSTA = 0xa00; // Clear cmd_end(with rsp)} while (0);}void Clr_Prt(void){//-- Clear protection addr.0 ~ 262144(32*16*512) ////Uart_Printf("[Clear protection(addr.0 ~ 262144) test]\n");do{//--Make ACMDSDICARG = 0; // CMD29(addr)SDICCON = (0x1 < 9) | (0x1 < 8) | (MAGIC_NUMBER | 29); //sht_resp, wait_resp, start, CMD29//-- Check end of CMD29if (!Chk_CMDend(29, 1))continue;SDICSTA = 0xa00; // Clear cmd_end(with rsp)} while (0);}

总结：调试和运行还是用很在的差别的，eclipse调试没有问题的，运行就会有点小问题，eclipse可以确定程序的框架，运行可以细节地显示问题，那个延时Delay(200)没有问题，到运行时候调整为Delay(2000)才可以正常。jlink的速率什么的都会影响，并不能代码整个实时的运行效果。在线调试和下载运行调试相接合才是王道。