ARM启动代码分析（2440init.c）

;1)The code, which converts to Big-endian, should be in little endian code.
;2)The following little endian code will be compiled in Big-Endian mode.
; The code byte order should be changed as the memory bus width.
;3)The pseudo instruction,DCD cant be used here because the linker generates error.

;条件编译，在编译成机器码前就设定好
ASSERT:DEF:ENDIAN_CHANGE ;判断ENDIAN_CHANGE是否已定义
[ ENDIAN_CHANGE ;如果已经定义了ENDIAN_CHANGE，则判断,这里是FALSE
ASSERT :DEF:ENTRY_BUS_WIDTH ;判断ENTRY_BUS_WIDTH是否已定义
[ ENTRY_BUS_WIDTH=32 ;如果已经定义了ENTRY_BUS_WIDTH，则判断是不是为32
bChangeBigEndian ;DCD 0xea000007
]
;在bigendian中，地址为A的字单元包括字节单元A，A+1，A+2，A+3，字节单元由高位到低位为A，A+1，A+2，A+3
;地址为A的字单元包括半字单元A，A+2，半字单元由高位到低位为A，A+2

[ ENTRY_BUS_WIDTH=16
andeqr14,r7,r0,lsl #20 ;DCD 0x0007ea00也是b ChangeBigEndian指令，只是由于总线不一样而取机器码的顺序不一样,
;先取低位->高位 上述指令是通过机器码装换而来的

]

[ ENTRY_BUS_WIDTH=8
streqr0,[r0,-r10,ror #1] ;DCD 0x070000ea也是b ChangeBigEndian指令，只是
;由于总线不一样而取机器码的顺序不一样
]
|
bResetHandler;here is the first instrument 0x00这是第一条执行的指令
;主要内容为：关看门狗定时器，关中断，初始化 PLL 和时钟，初始化存储器系统。
]
bHandlerUndef;handler for Undefined mode
bHandlerSWI;handler for SWI interrupt
bHandlerPabort;handler for PAbort
bHandlerDabort;handler for DAbort
b.;reserved
bHandlerIRQ;handler for IRQ interrupt
bHandlerFIQ;handler for FIQ interrupt

;@0x20
bEnterPWDN; Must be @0x20.

;通过设置CP15的C1的位7，设置存储格式为Bigendian，三种总线方式
ChangeBigEndian
;@0x24
[ ENTRY_BUS_WIDTH=32
DCD0xee110f10;0xee110f10 => mrc p15,0,r0,c1,c0,0
DCD0xe3800080;0xe3800080 => orr r0,r0,#0x80; //Big-endian
DCD0xee010f10;0xee010f10 => mcr p15,0,r0,c1,c0,0
;对存储器控制寄存器操作，指定内存模式为Big-endian
;因为刚开始CPU都是按照32位总线的指令格式运行的，如果采用其他的话，CPU识别不了，必须转化
;但当系统初始化好以后，则CPU能自动识别

]
[ ENTRY_BUS_WIDTH=16
DCD 0x0f10ee11
DCD 0x0080e380
DCD 0x0f10ee01
;因为采用Big-endian模式，采用16位总线时，物理地址的高位和数据的地位对应
;所以指令的机器码也相应的高低对调

]
[ ENTRY_BUS_WIDTH=8
DCD 0x100f11ee
DCD 0x800080e3
DCD 0x100f01ee
]
DCD 0xffffffff ;swinv 0xffffff is similar with NOP and run well in both endian mode.
DCD 0xffffffff
DCD 0xffffffff
DCD 0xffffffff
DCD 0xffffffff
b ResetHandler

;Function for entering power down mode
; 1. SDRAM should be in self-refresh mode.
; 2. All interrupt should be maksked for SDRAM/DRAM self-refresh.
; 3. LCD controller should be disabled for SDRAM/DRAM self-refresh.
; 4. The I-cache may have to be turned on.
; 5. The location of the following code may have not to be changed.

;void EnterPWDN(int CLKCON);
EnterPWDN
mov r2,r0;r2=rCLKCON 保存原始数据 0x4c00000c 使能各模块的时钟输入
tst r0,#0x8;SLEEP mode? 测试bit[3] SLEEP mode? 1=>sleep
bne ENTER_SLEEP ;C=0,即TST结果非0，bit[3]=1

;进入PWDN后如果不是sleep则进入stop
;进入Stop mode
ENTER_STOP
ldr r0,=REFRESH
ldr r3,[r0];r3=rREFRESH
mov r1, r3
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0];Enable SDRAM self-refresh

mov r1,#16;wait until self-refresh is issued. may not be needed.
0subs r1,r1,#1
bne %B0

ldr r0,=CLKCON;enter STOP mode.
str r2,[r0]

mov r1,#32
0subs r1,r1,#1;1) wait until the STOP mode is in effect.
bne %B0;2) Or wait here until the CPU&Peripherals will be turned-off
; Entering SLEEP mode, only the reset by wake-up is available.

ldr r0,=REFRESH ;exit from SDRAM self refresh mode.
str r3,[r0]

MOV_PC_LR

ENTER_SLEEP
;NOTE.
;1) rGSTATUS3 should have the return address after wake-up from SLEEP mode.

ldr r0,=REFRESH
ldr r1,[r0];r1=rREFRESH
orr r1, r1, #BIT_SELFREFRESH
str r1, [r0];Enable SDRAM self-refresh

mov r1,#16;Wait until se