U-boot1.1.6移植到TQ2440开发板(上)

bank

2 个是可以作为 ROM、SRAM、SDRAM 等存储器 bank

BANK控制寄存器BANKCONx(BANKCON1~5)这几个寄存器用来控制BANK0~BANK5外接设备的访问时序，一般使用默认的0x0700即可。

BANK控制寄存器BANKCONx（BANKCON6~7,在8个BANK中，只有BANK6和BANK7可以外接SRAM和SDRAM，所以BANKCON6~BANKCON7与BANKCON0~BANKCON5有点不同。

在board文件夹中添加boot_init.c文件，并修改makefile（boot_init.c文件主要包含nand的读写，时钟的初始化，和代码的拷贝函数）

boot_init.c

#include

#include

#defineGSTATUS1 (*(volatileunsignedint*)0x560000B0)

#defineBUSY 1

#defineNAND_SECTOR_SIZE 512

#defineNAND_BLOCK_MASK (NAND_SECTOR_SIZE - 1)

#defineNAND_SECTOR_SIZE_LP 2048

#defineNAND_BLOCK_MASK_LP (NAND_SECTOR_SIZE_LP - 1)

charbLARGEBLOCK; //HJ_add 20090807

charb128MB; //HJ_add 20090807

voidnand_init_ll(void);

intnand_read_ll(unsignedchar*buf, unsignedlongstart_addr, intsize);

intnand_read_ll_lp(unsignedchar*buf, unsignedlongstart_addr, intsize);

staticvoidnand_reset(void);

staticvoidwait_idle(void);

staticvoidnand_select_chip(void);

staticvoidnand_deselect_chip(void);

staticvoidwrite_cmd(intcmd);

staticvoidwrite_addr(unsignedintaddr);

staticvoidwrite_addr_lp(unsignedintaddr);

staticunsignedcharread_data(void);

intNF_ReadID(void); //HJ_add 20090807

staticvoids3c2440_nand_reset(void);

staticvoids3c2440_wait_idle(void);

staticvoids3c2440_nand_select_chip(void);

staticvoids3c2440_nand_deselect_chip(void);

staticvoids3c2440_write_cmd(intcmd);

staticvoids3c2440_write_addr(unsignedintaddr);

staticvoids3c2440_write_addr_lp(unsignedintaddr);

staticunsignedchars3c2440_read_data(void);

staticvoids3c2440_nand_reset(void)

{

s3c2440_nand_select_chip();

s3c2440_write_cmd(0xff); // 复位命令

s3c2440_wait_idle();

s3c2440_nand_deselect_chip();

}

staticvoids3c2440_wait_idle(void)

{

inti;

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

volatileunsignedchar*p = (volatileunsignedchar*)&s3c2440nand->NFSTAT;

while(!(*p & BUSY))

for(i=0; i<10; i++);

}

staticvoids3c2440_nand_select_chip(void)

{

inti;

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

s3c2440nand->NFCONT&= ~(1<1);

for(i=0; i<10; i++);

}

staticvoids3c2440_nand_deselect_chip(void)

{

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

s3c2440nand->NFCONT|= (1<1);

}

staticvoids3c2440_write_cmd(intcmd)

{

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

volatileunsignedchar*p = (volatileunsignedchar*)&s3c2440nand->NFCMD;

*p = cmd;

}

staticvoids3c2440_write_addr(unsignedintaddr)

{

inti;

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

volatileunsignedchar*p = (volatileunsignedchar*)&s3c2440nand->NFADDR;

*p = addr & 0xff;

for(i=0; i<10; i++);

*p = (addr >> 9) & 0xff;

for(i=0; i<10; i++);

*p = (addr >> 17) & 0xff;

for(i=0; i<10; i++);

*p = (addr >> 25) & 0xff;

for(i=0; i<10; i++);

}

staticvoids3c2440_write_addr_lp(unsignedintaddr)

{

inti;

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

volatileunsignedchar*p = (volatileunsignedchar*)&s3c2440nand->NFADDR;

intcol, page;

col = addr & NAND_BLOCK_MASK_LP;

page = addr / NAND_SECTOR_SIZE_LP;

*p = col & 0xff;

for(i=0; i<10; i++);

*p = (col >> 8) & 0x0f;

for(i=0; i<10; i++);

*p = page & 0xff;

for(i=0; i<10; i++);

*p = (page >> 8) & 0xff;

for(i=0; i<10; i++);

if(b128MB == 0)

*p = (page >> 16) & 0x03;

for(i=0; i<10; i++);

}

staticunsignedchars3c2440_read_data(void)

{

S3C2440_NAND* s3c2440nand = (S3C2440_NAND*)0x4e000000;

volatileunsignedchar*p = (volatileunsignedchar*)&s3c2440nand->NFDATA;

return*p;

}

staticvoidnand_reset(void)

{

s3c2440_nand_reset();

}

staticvoidwait_idle(void)

{

s3c2440_wait_idle();

}

staticvoidnand_select_chip(void)

{

inti;

s3c2440_nand_select_chip();

for(i=0; i<10; i++);

}

staticvoidnand_deselect_chip(void)

{

s3c2440_nand_deselect_chip();

}

staticvoidwrite_cmd(intcmd)

{

s3c2440_write_cmd(cmd);

}

staticvoidwrite_addr(unsignedintaddr)

{

s3c2440_write_addr(addr);

}

staticvoidwrite_addr_lp(unsignedintaddr)

{

s3c2440_write_ad