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移植u-boot 1.1.6到TQ2440开发板-第四阶段

时间:11-26 来源:互联网 点击:
上一阶段完成了对Nor Flash的配置,这一阶段主要完成对Nand Flash的读写驱动

移植u-boot 1.1.6到TQ2440开发板-第四阶段

增加Nand Flash的读写驱动

任务:移植nand- flash驱动,让u - boot可以操作读写nand flash 。由于s3c2410 和s3c2440
nand flash 控制器有区别,所以修改以下代码,让u - boot可以操作读写nand flash 。

1、增加nand_flash.c文件:cpu/arm920t/s3c24x0/nand_flash.c

#include
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include
#include
DECLARE_GLOBAL_DATA_PTR;
#define S3C2410_NFSTAT_READY(1<0)
#define S3C2410_NFCONF_nFCE (1<11)
#define S3C2440_NFSTAT_READY (1<0)
#define S3C2440_NFCONT_nFCE (1<1)

static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2410_NAN D * const s3c2410nand = S3C2410_GetBase_NAND();
if (chip == - 1)
{
s3c2410nand - >NFCONF |= S3C2410_NFCONF_nFCE;
}
else
{
s3c2410nand - >NFCONF &= ~S3C2410_NFCONF_nFCE;
}
}

static void s3c2410_nand_hwcontrol(struc t mtd_info *mtd, int cmd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
struct nand_chip *chip = mtd- >priv;
switch (cmd)
{
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE n", __FUNCTION__);
break;
case NAND_CTL_SETCLE:
chip- >IO_ADDR_W = (void *)&s3c2410nand - >NFCMD;
break;
case NAND_CTL_SETALE:
chip- >IO_ADDR_W = (void *)&s3c2410nand - >NFADDR;
break;
default:
chip- >IO_ADDR_W = (void *)&s3c2410nand - >NFDATA;
break;
}
}

static int s3c2410_nand_devready(struct mtd_info *mtd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
return (s3c2410nand - >NFSTAT & S3C2410_NFSTAT_READY);
}

static void s3c2440_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
if (chip == - 1)
{
s3c2440nand - >NFCONT |= S3C2440_NFCONT_nFCE;
}
else
{
s3c2440nand - >NFCONT &= ~S3C2440_NFCONT_nFCE;
}
}

static void s3c2440_nand_hwcontrol(struct mtd_info *mtd,int cmd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
struct nand_chip *chip = mtd- >priv;
switch (cmd)
{
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE n", __FUNCTION__);
break;
case NAND_CTL_SETCLE:
chip- >IO_ADDR_W = (void *)&s3c2440nand - >NFCMD;
break;
case NAND_CTL_SETALE:
chip- >IO_ADDR_W = (void *)&s3c2440nand - >NFADDR;
break;
default:
chip- >IO_ADDR_W = (void *)&s3c2440nand - >NFDATA;
break;
}
}

static int s3c2440_nand_devready(struct mtd_info *mtd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
return (s3c2440nand - >NFSTAT & S3C2440_NFSTAT_READY);
}

static void s3c24x0_nand_inithw(void)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
#define TACLS0
#define TWRPH04
#define TWRPH12
if (gd - >bd- >bi_arch_number == MACH_TYPE_SMDK2410)
{

s3c2410nand - >NFCONF =
(1<15)|(1<12)|(1<11)|(TACLS<8)|(TWRPH0<4)|(TWRPH1<0);
}
else
{

s3c2440nand - >NFCONF = (TACLS<12)|(TWRPH0<8)|(TWRPH1<4);

s3c2440nand - >NFCONT = (1<4)|(0<1)|(1<0);
}
}

void board_nand_init(struct nand_chip *chip)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
s3c24x0_nand_inithw();
if (gd - >bd- >bi_arch_number == MACH_TYPE_SMDK2410)
{
chip- >IO_ADDR_R = (void *)&s3c2410nand - >NFDATA;
chip- >IO_ADDR_W = (void *)&s3c2410nand - >NFDATA;
chip- >hwcontrol = s3c2410_nand_hwcontrol;
18
chip- >dev_ready = s3c2410_nand_devready;
chip- >select_chip = s3c2410_nand_select_chip;
chip- >options = 0;
}
else
{
chip- >IO_ADDR_R = (void *)&s3c2440nand - >NFDATA;
chip- >IO_ADDR_W = (void *)&s3c2440nand - >NFDATA;
chip- >hwcontrol = s3c2440_nand_hwcontrol;
chip- >dev_ready = s3c2440_nand_devready;
chip- >select_chip = s3c2440_nand_select_chip;
chip- >options = 0;
}
chip- >eccmode = NAND_ECC_SOFT;
}
#endif

2、同时修改该目录下的Makefile:29 行
COBJS= i2c.o interrupts.o serial.o speed.o
usb_ohci.onand_flash.o

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