紧急！allegro 导入网表报错
时间：10-02
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紧急！allegro 导入网表报错
ERROR(SPMHNI-175): Netrev error detected.ERROR(SPMHDB-195): Error processing 'MTG1': Cannot modify element; the object or a parent has the FIXED property. [help].------ Library Paths ------MODULEPATH = . D:/Cadence/SPB_16.6/share/local/pcb/modules PSMPATH = D:/linshi/ . symbols .. ../symbols D:/Cadence/SPB_16.6/share/local/pcb/symbols D:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols D:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols D:/fzk/ D:/TX/ D:/hanpan/ D:/linshi/ PADPATH = . symbols .. ../symbols D:/Cadence/SPB_16.6/share/local/pcb/padstacks D:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols D:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols D:/hanpan/ ------ Summary Statistics ------#2 Run stopped because errors were detectednetrev run on Dec 6 17:38:45 2014 DESIGN NAME : 'XM' PACKAGING ON Sep 10 2012 04:46:09 COMPILE 'logic' CHECK_PIN_NAMES OFF CROSS_REFERENCE OFF FEEDBACK OFF INCREMENTAL OFF INTERFACE_TYPE PHYSICAL MAX_ERRORS 500 MERGE_MINIMUM 5 NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|' NET_NAME_LENGTH 24 OVERSIGHTS ON REPLACE_CHECK OFF SINGLE_NODE_NETS ON SPLIT_MINIMUM 0 SUPPRESS 20 WARNINGS ON 2 errors detected No oversight detected No warning detectedcpu time 0:00:24elapsed time 0:00:00
ERROR(SPMHNI-175): Netrev error detected.ERROR(SPMHDB-195): Error processing 'MTG1': Cannot modify element; the object or a parent has the FIXED property. [help].------ Library Paths ------MODULEPATH = . D:/Cadence/SPB_16.6/share/local/pcb/modules PSMPATH = D:/linshi/ . symbols .. ../symbols D:/Cadence/SPB_16.6/share/local/pcb/symbols D:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols D:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols D:/fzk/ D:/TX/ D:/hanpan/ D:/linshi/ PADPATH = . symbols .. ../symbols D:/Cadence/SPB_16.6/share/local/pcb/padstacks D:/Cadence/SPB_16.6/share/pcb/pcb_lib/symbols D:/Cadence/SPB_16.6/share/pcb/allegrolib/symbols D:/hanpan/ ------ Summary Statistics ------#2 Run stopped because errors were detectednetrev run on Dec 6 17:38:45 2014 DESIGN NAME : 'XM' PACKAGING ON Sep 10 2012 04:46:09 COMPILE 'logic' CHECK_PIN_NAMES OFF CROSS_REFERENCE OFF FEEDBACK OFF INCREMENTAL OFF INTERFACE_TYPE PHYSICAL MAX_ERRORS 500 MERGE_MINIMUM 5 NET_NAME_CHARS '#%&()*+-./:=>?@[]^_`|' NET_NAME_LENGTH 24 OVERSIGHTS ON REPLACE_CHECK OFF SINGLE_NODE_NETS ON SPLIT_MINIMUM 0 SUPPRESS 20 WARNINGS ON 2 errors detected No oversight detected No warning detectedcpu time 0:00:24elapsed time 0:00:00
表示没看懂小编的问题
高亮所有GROUP，看到GROUP后，光标移动到GROUP或者MODULE位置，右键，选择disband group. 这样之后，再导入网表，就没有问题了。