DDS+ dual loop pll topology
时间：04-06
整理：3721RD
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Hi All,
I am reading Alexander Chenakin's
Building a Microwave Frequency Synthesizer?Part 4: Improving Performance
and saw a dual loop pll topology (Fig. 47) and DDS spur reduction (Fig.41 in the article).
I couldn't find any specific designs with DDS+ dual loop pll topology (schematic+ performance data).
Can anybody point a refenece?
Thanks
I am reading Alexander Chenakin's
Building a Microwave Frequency Synthesizer?Part 4: Improving Performance
and saw a dual loop pll topology (Fig. 47) and DDS spur reduction (Fig.41 in the article).
I couldn't find any specific designs with DDS+ dual loop pll topology (schematic+ performance data).
Can anybody point a refenece?
Thanks