Two Questions about Power Amplifier Output Matching
1. In THIS paper, the author states that "For highpower transistors, the device impedance are usually less than 10 ohms. This presents a difficult impedance matching problem in a 50 ohms environment. It often results in highly complex, narrow band and lossy matching networks." Why? I mean, don't we want the output impedance of a power amplifier to be as small as possible so that most of power is delivered to the load (50ohms)? Why does this impose a problem? Matching with Smith chart, isn't it true that we can match whatever load onto 50ohms as long as the load has real part? Why do we care about if the output impedance of the PA is too small?
2. From time to time, I heard people talking about the efficiency of matching networks. Why do matching networks have efficiency if they consist of only passive components (L'c and C's, or lossless T-lines)?
Thanks a lot!
1. Many reasons but efficiency is a important factor. Low impedance costs high current. High current costs more expensive parts, then low current solutions. Unnecessary high current drys the battery in your cellphone faster.
2. Assume a 1GHz transmitter @50 Ohm that is connected to an antenna with 50 pF capacitive coupling to ground. 50 pF causes a reactive impedance corresponding to 3 Ohm. It is a complex impedance but antenna voltage will be very low. Do you know any component that can compensate in a such way that whole capacitive load will be invisible and allow full generator voltage feed to antenna? With some more knowledge can also resistive losses be compensated with reactive components. It is not really any improvement of system efficiency, it is more a way to avoid losses at wrong place.
In this case do we want as much as possible of generated power to be lost as antenna radiation instead of generating internal heat.
The mismatch loss between two impedance terminations is given by: Mismatch Loss [dB] = 10*LOG (1 - Γ2)
So, greater the difference between impedances, higher the reflection coefficient Γ, and higher the mismatch loss.
Thank you so much for replying me!
For question 1, do input and output impedance of a FET affect current it outputs? I mean, essentially FETs are voltage controlled current source. So if a FET has really small input impedance (the case of PA), in terms of voltage swing at the gate, it will be very small compared to the original source output. Because by voltage division and maximum power transfer theorem, most of power is dissipated by the source impedance. That's why we need to have matching network at the input of the FET to convert the source impedance (could be 50 ohms) into the conjugate of the input impedance of the FET (Zin*), so that maximum power can be delivered to the gate of the FET. In other words, by matching the input of a FET, we are enlarging Zin and enabling it to see maximum voltage swing at the gate. Now the problem is, why it is hard to make a matching network that converts 50 ohms source impedance to Zin*? Isn't Smith capable to convert 50 ohms to whatever impedance as long as it has real part?
For question 2, I don't know if I understand you right. Do you mean that the efficiency of a matching network is determined by something like this: efficiency = (real power output from the matching network) / (total power delivered to the matching network) ?
Once again, thank you so much Kafeman!
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Thank for your reply vfone!
What you said is 100% true. However, in case of a matching network, I thought it doesn't have useful "input / output impedance" on itself. Rather, it converts whatever is connect after the network into a desired value. Hence looking into the matching network, the source for example, can see a load which enabling maximum power transfer to the network, and hence the load connected after the network. In all of these, where does the concept of mismatch loss come to play?
You have a correct understanding of what a matching network does, however the issue lies in implementation of those networks. In order to go from a few ohms, up to 50 ohms, you need a modestly complex matching network.
Add to that the need to be broadband and the matching network complexity increases. Now it's not going to be perfectly matched to 50 ohms (or the input impedance) at all frequencies, so the network will reflect some of the power back to the source. That is what causes a matching network to be less than 100% efficient... not all the input power makes it to the load, whether by internal resistive losses (L's and C's have some Rs/Rp, which is what gives you Q), or by real resistive matching elements, or simply due to reflection from an imperfect match.
So is it true that if the entire system operates at only one frequency and there is no divination away from this frequency during operation, then the matching networks in such a system have 100% efficiency?
Speaking of reflection, enjunear, my mind doesn't click on one thing. According to Pozar and the following figure from his Microwave Engineering textbook, the input matching network is placed to convert the source impedance Z0 into Zs, which is Zin conjugate (Zin*), such that Gamma s is the conjugate of Gamma in, and maximum power transfer can be realized. However, by doing so, the interface between the source impedance Z0 and the input impedance looking into the input matching network will not be matched. Hence there will be severe reflection happen at this interface. Why don't we change our strategy and make the input matching network such as Zin is converted to Z0 so that there is no reflection at Z0 and input matching network junction? Basically, there are two choices for input matching, one is to match Z0 to Zin*, another is to match Zin to Z0. Why do people prefer the first choice?
Thank a lot!
I like to do the match according to the direction of wave propagation.
Hi, could you establish more? For sure that for output matching, it makes sense to match the 50 ohms load to Zopt required by the FET. But what about in the case for input? Do you match Zin to 50 ohms source impedance, or 50 ohms to Zin* so that looking from the gate of the FET, it can see a perfect conjugate impedance?
Matching circuit should match in both directions, always conjugate. A FET gate is normally a bit capacitive load and adding same amount of cap load in a matching circuit would result in mismatch and reflections.
Do you know Gamma opt direction in the LNA design? that is from LNA to source.
So you can set gamma opt as source, then set 50 ohms source as load.
Not quite, but close. No components are perfect, they all have some mechanism of loss, so you will never obtain 100% efficiency. Also, you have to account for component value tolerances and physical placement variations, these will de-tune from the "perfect match". In reality, a few tenths of a dB of insertion loss for a single-frequency match is doing quite well, so that's a reasonable benchmark to use.
The point of the matching network is to transform a perfect 50 ohm system impedance to some desired non-50 ohm impedance. The network works in both directions, so both the input and output of the matching network will be perfectly matched when loaded with the correct impedances. Try it out... design a circuit that transforms 50 ohms into 12+j280 ohms (assuming your load is 12-j280 ohms, for a conjugate match). Then go through the match backwards... start with 12+j280 ohms, apply the impedance transformations presented by the matching circuit, and you should wind up with 50 ohms again.