ESD_protection_diode_in_CMOS_RFIC_process
时间：04-06
整理：3721RD
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Hello everyone,
I have one question again. I want to ESD protect an RFIC and i have to make the 2 input diodes that are gonna be connected from the input to the VDD and ground respectively. In order to make them from MOSFETS I have connected togetgher the source,gate, bulk which constitute the one terminal and the drain is the other one. When the input goes above/under the VDD/ground, the diodes are supposed to clamp the input to the appropriate rail (1.8 and 0V). Compared to an ideal one, the diode i made has a finite turn on time and after it turns on it settles at 2.4V and not 1.8 (this is a non zero Vforward right?). Can i optimize it in any way so that i get characteristics closer to the ideal ones? If yes in what direction should the appropriate dimensions (W,L and source drain area and periphery) to be oriented?. Thank you in advance
Georgios
I have one question again. I want to ESD protect an RFIC and i have to make the 2 input diodes that are gonna be connected from the input to the VDD and ground respectively. In order to make them from MOSFETS I have connected togetgher the source,gate, bulk which constitute the one terminal and the drain is the other one. When the input goes above/under the VDD/ground, the diodes are supposed to clamp the input to the appropriate rail (1.8 and 0V). Compared to an ideal one, the diode i made has a finite turn on time and after it turns on it settles at 2.4V and not 1.8 (this is a non zero Vforward right?). Can i optimize it in any way so that i get characteristics closer to the ideal ones? If yes in what direction should the appropriate dimensions (W,L and source drain area and periphery) to be oriented?. Thank you in advance
Georgios