PSS analysis problem with Verilog-A and hidden states
时间：04-06
整理：3721RD
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Hi everyone,
I want to simulate the effect of mismatch and process variation on the system performance of my SAR Analog to Digital Converter. The system now is simply ideal system with only one transistor level block, the other blocks are written
in Verilog-A code in Cadence-Spectre.
The easiest way to simulate the mismatch and process variation (with 200 M.C. runs) is to use PSS analysis instead of transient simulation (which will be very time consuming) ..
I did the simulation of mismatch and process variation (with 200 M.C. runs) for a continuous time block like Gm stage, but when comes to the system where Verilog-A blocks exist I got the following message:
----------------------------------------------------------------------------------
" Error found by spectre during periodic steady state analysis `pss'.
ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DAC_ideal_10b'. Skipped.
Hidden state variable: C_S
Hidden state variable: reset
Analysis `pss' was terminated prematurely due to an error."
-----------------------------------------------------------------------------------
Anybody has an idea how to solve this problem, or suggest another way to simulate the effect of mismatch and process variation (with 200 M.C. runs) on the signal to distortion ratio?
Thank you
I want to simulate the effect of mismatch and process variation on the system performance of my SAR Analog to Digital Converter. The system now is simply ideal system with only one transistor level block, the other blocks are written
in Verilog-A code in Cadence-Spectre.
The easiest way to simulate the mismatch and process variation (with 200 M.C. runs) is to use PSS analysis instead of transient simulation (which will be very time consuming) ..
I did the simulation of mismatch and process variation (with 200 M.C. runs) for a continuous time block like Gm stage, but when comes to the system where Verilog-A blocks exist I got the following message:
----------------------------------------------------------------------------------
" Error found by spectre during periodic steady state analysis `pss'.
ERROR (SPCRTRF-15177): PSS analysis doesn't support behavioral module components with hidden states found in component 'DAC_ideal_10b'. Skipped.
Hidden state variable: C_S
Hidden state variable: reset
Analysis `pss' was terminated prematurely due to an error."
-----------------------------------------------------------------------------------
Anybody has an idea how to solve this problem, or suggest another way to simulate the effect of mismatch and process variation (with 200 M.C. runs) on the signal to distortion ratio?
Thank you