high dielectric constant antenna materials

Hi,
I work on an electrically small microstrip antenna. My first step is using high dielectric constant materials for reducing antenna's size. However, I didn't found dielectric materials from Rogers or Arlon that their dielctric constant is more than 10.2. Therefore, my question is whether there exist dielectric materials that their dielectric constant is very high(30,40,50...) and where I can purchase them.
Thanks

Maybe you can use LTCC, look at 5674 higk-k paste

another LTCC material
http://www.hirai.co.jp/ltcc/HiraiPre...TCC2008r2E.pdf

Have you tried to use a ceramic substrate like these:
PD 270 270 5x10-3 0.25 Pacific Ceramic Inc.
PD 160 160 1x10-3 0.25 Pacific Ceramic Inc.
D77 77 5x10-4 0.2 Morgan Electro Ceramics Ltd
Titania 192 85 1x10-3 0.2 (?) Ceramtech North America

we use the last of the list but it is soo expancive (about 3kS for 10 disk)

you can try on LTCC
or Alumina
some other High K dielectrics which are used in ULSi process if you are doing your study project just get back to me i'll suggest some other materials

__sree

Question

Is it really possible to use such a high Er for an antenna ?

Yes but you may get in low gain when compared to the low dielectric

Designing the antenna using High K may be usefull,
but practical purposes gain may become very less, when u compress area

__sree

You can use periodical structures to realize artificial high dielectric constant substrate.

But the problem with such high-K substrate electrical small antenna is low radiation efficiency, low gain, and possible narrow bandwidth, when compared with other regular substrate antennas.

Hi
The oxide layer has been made of Hafnium Dioxide (HfO2) and has been grown using dry etching, in which during etching a thin layer of SiO2 will be formed as an intermediate layer between body and oxide. The thickness of SiO2 is 1 nm whereas the oxide thickness, in which is varied between 2 to 5 nm, has to be investigated using SILVACO.
The device is part of DRAM cells and has to work at voltages up to 3.3 V and has to be fabricated based-on 22 nm technology.
The aspect ratio (W/L) of the device is varied between 1.5 to 3.0 due to minimization of the overall design.
The thicknesses of ?S? and ?D? region as well as Silicide/Hafnide metals are arbitrary (not more than 100 nm) and whole device has to be fabricated on a single 450nm Si wafer. Remember: Gate metal, Hf+Al, differs with ?S?, ?D?, and ?B? that are Si+Al.
The doping concentrations of ?S? and ?D? region are either n+ or p+, depends on the bulk, must be done using Boron or Phosphor Ion-Implantation
1: C-V Analysis of Structure. Bulk: n-Si (1.5x1017 #/cm-3)
2: C-V Analysis of Structure. Bulk: p-Si (15x1017 #/cm-3)
3: ID-VG (fixed voltage of VD=3.3V) Analysis of Structure. Bulk: n- (1.5x1017 #/cm-3)
4: ID-VG (fixed voltage of VD=3.3V) Analysis of Structure. Bulk: p-Si (15x1017 #/cm-3)

Conclusion should address which feature (W/L) gives the best performance of the device in term of quantized electron density and either C-V or I-V characterization of the device

can someone help me for silvaco code