50ohm microstripline on silicon

Hello,
I'm designing a microstrip patch antenna on silicon with permettivity 11.9 and 0.2mm height to operate at 60 GHz. I need the 50 ohm microstrip line. Using Linecalc of ADS , i find W=0.17mm. How much length of 50 ohm microstrip should i make and how much its length affects the different parameters of the antenna? Please answer me, i need your help

Hi ing_2012,

Transmission-line theory is the one of the core topics of microwave engineering. Knowledge of this theory will help you to answer this question, which no one else can answer given the information you specified. See for example this textbook.

Firstly, I would ensure that the antenna has a 50 Ohm input impedance.

Good Luck

200μm thickness sounds wrong for on-chip antennas. The patch antenna ground plane must be above the lossy silicon substrate, with oxide as the antenna dielectric. Ground plane on lowest metal level, patch on top metal. This means that the dielectric thickness (oxide) is much thinner than 200μm. It is more like 10μm or so, depending on your technology.

The calculated width from linecalc will not be accurate because that is calculated with air above the line, but on chip your line has oxide + passivation above.

Have you looked at literature how others have done this?
http://i-scover.ieice.org/proceeding.../pdf/1B4-2.pdf

Hi
Thank you PlanarMetamaterials for your help

Thanks volker@muehlhaus for your answer, but patch antenna on chip has very bad gain and bandwidth impedance... Have a look at this paper, there are a comparison betwaaen antenna on full GaAs and with the micromachined one (both silicon and GaAs are lossy substrates).

It depends how it is done. Some friends (chip designers at Bochum university) have implemented nice on-chip patch antennas @ 240GHz in SiGe technology with good gain.

That is a really old paper from 1998. Micro-machining (or substrate back etching) are one possible way to create on-chip patch antennas, but difficult and expensive. Newer design try to avoid that.

Both are lossy, but the fundamental difference is that GaAs has moderate dielectric loss (loss tangent) whereas silicon (bulk) substrate is conductive. That makes a big difference in performance, if the silicon substrate is part of the antenna, as you had tried above.

As you can see from the PDF that I linked above, people try to avoid that and build the patch antenna in the upper part of the stackup, with the ground above the silicon. Then we don't have to worry about the silicon losses and because now we have inter-metal oxide as the antenna dieelectric. The only difficulty for patch antenna design then is the small height of oxide between the metal layers.