How to overcome CONVERGENCE problem for our CKT using Agilent ADS2011.10
How to overcome this convergence problem for my designed circuit, latter I am able to obtain IIP3 measurement.
Herewith I attached the Schematic of my circuit, HB2 tone swept power simulation generated convergence error file, and solving convergence using "OPTIONS" setting file.
You have many capacitors and inductors, but few resistors.
I have seen a simulator get bogged down when two or more capacitors are connected in series.
Try putting a low-ohm resistor in series with every capacitor and inductor. This creates a time constant which might give the simulator an easier time.
Also try different time step values. What frequency does your circuit operate at? See if it helps to set the time step so there are between 50 and 1,000 steps within this period.
My circuit operating frequency is 3.5 GHz. Can you advice, what time steps I have to use for avoiding convergence and what low -ohm resistors I have to use for avoiding convergence.
The simulator tries to achieve convergence. I think its report is telling you that it gets a 'no convergence' error.
The report mentions L17 as a cause of error. Try putting a 1 ohm resistor inline with it.
Or there is a chance the simulator is confused by two parallel inductors. Try disconnecting either L17 or L13.
The report states that convergence was able to be achieved when it added resistors in the circuit. The values given are suitable for a start. (I was thinking 1 ohm because it is easy to type, and it is not likely to interfere with your circuit's operation.)
If the above steps do not succeed, then try simplifying your circuit. Remove some sections. If the simulation runs okay, then you can put the sections back again.
As you said, I followed it. Now it is not showing no convergence, but it is not showing anything in the graph, blank graph it is showing.
In the graph, it is said us increase the maximum order. Even increased the order also, I am getting blank IIP3 graph.
Here with I attached Schematic and PDF of the generated IIP3 graph and hpeesofim file.
Sorry, I'm not familiar with Agilent. About all I can suggest is that you make sure you set the timeframe of the graph so it matches the timeframe of the simulation run.
Also try the example circuits, or demo graph circuits, that show you how to create graphs.
As for suggesting a timestep, multiply your frequency times 100.
Thus 3.5 GHz x 100, equals 350 GHz.
Take the reciprocal, and you get 2.9 pica-Seconds for the timestep.
Try 3, or 2, or 1 pSec.
As you suggested timestep. Where I have to set timestep 3, or 2, or 1pSec. In schematic, we have only sweep plan and course plan, there we can set start power and end power.
I have got got, where I have to set the time step of 3, or 2, or 1 pSec.
How did you get this schematic ? I have never seen such a nonsense schematic in my life ....
Your problem is not a convergence problem, your circuit is definitely wrong.Biasings are wrong, inputs. outputs are wrong, there are XXX nH at the sources, resistive matching...
There are tens of error..
The drain of second FET is connected to VDD and it's connected to the next stage at the same time.So its output is short circuited...
There are XXX nH inductors ( If I see correctly ).. What are your trying to do ? Oscillator ?
Have your ever checked the bias voltages and currents ? You got many things to do...
Before jumping into such complex designs, read something about LNAs and follow up some tutorials,presentations, etc. about circuit simulation and design techniques..