Power Amplifier problem

Preceed it with an emitter follower?
Frank

Thanks Frank.
Input capacitance to the driver is about 13 pF. How can I design the source follower so that maximum current flows into the stage.
I thought of taking a capacitance of 1 pF as the load of the source follower and additionally the output stage is connected to the output of the source follower.
So after current division more ratio of current will flow through the output stage. But that isn't happening. What am I doing wrong?

Frank, it works !
Thanks very much, but I have to dissipate large amount of power, about 15 mW, for delivering 1 mW power to the resistor. PAE will be very bad!
Fortunately the dissipation from the source has reduced by a large amount. I can still reduce the dissipation through the source by adding small signal amplifiers to the input of the source follower.

Any hints for reducing the power dissipation...

If your target is reduce the Power Consumption and improve the PAE, you have to know the "Optimum Impedance for max. PAE". This is done by Load Pull Technique only ( either simulation or measurement) otherwise your PA will always have much less than %50 PAE ( I presume that is A-Class PA ).
For a starting point for Optimum Load Resistance may be considered being as VDD/Ids from Load-Line Theory but the real result is found with Load Pull..

You can call it a class A PA since it is conducting all the time. I am learning PAs. So can you post some references about load pull and optimum impedance for maximum PAE.
Thank you very much for your input.
Also I calculated free space path loss for a 400 MHz wave for transmission between a transmitter and a receiver and also considered the sensitivity of a LNA at the receiver and found out that 0.5 mW power is sufficient to establish good connection between the transmitter and receiver.
And I brought down the power dissipation from VDD to 6 mW and that from source to 75 μW.