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Tx and Rx buffer in ADF7242

时间:04-04 整理:3721RD 点击:
Hi,

I am attempting to transmit and receive using two ADF7242 boards. The datasheet of ADF7242 says that it has 256 bytes of dedicated RAM which constitute Tx and Rx buffers. I allocated the first 128 bytes to reception and the next 128 bytes to transmission by setting the base address for Tx and Rx appropriately. Next, I transmitted a continuous stream of 0xAA. On the reception side, I was able to receive only a few initial 0xAA stream followed by a stream of 0x14. I would like to know what could be the problem for not being able to read 128 bytes of data.

those things add a preamble and synch header before each packet. is this what you are seeing?

The problem was with the number of packets to be written into the Tx buffer with and without FCS enabled. With correct number of packets written, I was able to read the data without any problem at the receiver.


Thanks.

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