negative bias voltage generation
If source is tied to ground, Vgs=-0.2V, then the gate voltage should be -0.2V.
How to generate such negative bias voltage in chip?
Thanks.
Usually an oscillator or signal derived from one is divided down to a frequency suitable for rectification then capacitively coupled to a rectifier or voltage doubler wired to give a negative output.
Brian.
In some element controller custom chips I've done,
Vg was supplied and sensed (for sequencing; if not
proper, do not apply drain power). In discussions with
the MMIC designers that my chip was to support, it
was said that the Vg (gate) voltage needed to be very
low noise - ripple there will modulate the carrier making
some nasty spurs. My chips included "active bias" amps
to drive Vg such that drain current sensed, was on
target. Applying a fixed Vg is only good if you have
fixed conditions (temp, supply, MMIC processing
variation).
So I would suggest to you that a simple charge pump
is probably going to get you as far as functionality,
but pollute your output spectrally. You'd need a good
linear regulator with decent high frequency PSRR to
clean up any switching converter produced supply.
And having this on chip is almost certain to put all
kinds of nasty onto the local ground, which can kill
you the same way.
Maybe you don't want a peanut butter and hand
grenade sandwich, is all I'm saying.
Very often a -ve supply only needs to supply a few milliamps, and voltage regulation is not critical. For that, a simple capacitor voltage pump circuit as previously suggested above, will be quite sufficient.
Another option might be to ground the gate, use a source
(or emitter if HBT) degeneration resistor to set DC bias
(crudely, but somewhat) and shunt that with a high
quality RF capacitor to get HF device gain. You could
ground the gate through a resistor and couple the
input in with a capacitor (you may be, already). But
gate resistance also adds LF noise (which becomes
phase noise, probably). Still these resistors will be way
quieter than a charge pump, chopping wood.
Charge pumps have been integrated with RF (I am
well aware of this specifically for CMOS RF switches)
but the design of these pumps is specialized, has
aggressive patent coverage and isn't much like the
bang-bang capacitor charge pumps that you would
think of offhand. And the pump only has to provide
roughly zero current to bias stacked MOSFET gates,
not even fractional milliamps. Push it harder and the
charge pump spurs start to show, big time.
In a power amplifier design (as the initial post mentioned) if you place a resistor in source the efficiency it will drop dramatically.
This approach can be done only in low signal stages, as LNA, Mixers, etc.
That's why I mentioned the shunt capacitor.
The shunt capacitor doesn't help at all for not losing efficiency, if you place a source resistor in a power amplifier stage.
The shunt capacitor helps only in a low signal stage (as an LNA) to don't reduce the gain of the amplifier (due to signal loss through the source resistor).
LTC1551 from linear technology
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