help

My issue is that how to define those two side grounds of CPW ?
Since they(side grounds) are seperated by the signal line and will not have opportunity to contact each other, how to define they two to be grounds in the same time?

Use two impedance lines or some other ways exist?

hope this is legal, not a repeated information and, most importantly, it helps.

OK. i confess

i need points to download

but hope this helps any way.

Nice to hear reply from you !
Actually, what I am wondering is that the "wave port" 's size is
somewhat hard to match two important criterion in the same time:
1. The port need to be large enough to reduce edge-effect.( >3(2g+w)
recommended)
2. port's left & right edges need to contact the two side- grounds to
let them be connected together, to form the "lateral ground".
However, it is tough to meet above two requirements sometimes. For
instance, since the lateral metal trace have limited width, it is very
possible that the port had to be so wide (that all three metal traces are
included in the port) to meet requirement 1. Then, the edge of port
will bot contact lateral grounds. These two side-grounds are seperated
eletrically.
How to resolve this issue?
Thanks!

add another criteria:
- this is engineering, sometimes, art, but 99% time/composition are definitely not science

- but this 1% science only determines how we use screw driver. so it becomes intuition eventually

here is my answer

1/ should be satisfied most of time.

2/ should not be a problem

i guess the difficulty lies on the width of two ground conductors, right?

if so, you can try to reduce the ground width. field attenuted very fast beyond the edge. this reduction also improves the efficiency. you know how slow FEM converges.

if ground width has to be THAT big, you can shrink the port width to be a portion of the enclosure lateral surface. there is one figure in CPW tutorial showing this.

let me see.. page 8, bottom right

this figure intended to show you, if the port is too narrow, substatial field goes out of the port region. this should not be a problem if port width> 3(2g+w).

reverse scenario:
you have very narrow ground conductor... gorund width is comparable to center strip width. it is called finite-ground CPW (FGCPW)

port width> 3(2g+w) does NOT apply at all. you can forget the crit#1.

make the enclosure surface big enough to cover the whole line with some space between the CPW grounds and side wall (should be PML or packages). let port lying in the center cover the conductors and contacts grounds.

still use wave port

good luck!

Thanks, you last post did cast light on me!
Thanks!

Make your enclosure walls conductors. Let your ground plane conductors contact the walls. They will then be grounded. One nice thing about EM simulators is you have to create a geometry that more or less reflects how you would do it in the real world with real conductors. Enough theory - give me results!

mike has a FGCPW. not sure it is a common practice that a metal package (side wall) would be close (or contact) to cpw grounds in this case.

for FGCPW, the two close sode walls could cause resonance? affect impedance? in short, more packging effect??

not sure, please advise.

-yes. you are right. i am preparing for another download.

why not upload a FGCPW HFSS example?
Pure model will bot be too large.
Thank!

is there any examples about metallic photonic crystal?