sot343 footprint
时间：03-22
整理：3721RD
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Hello. I've skimmed all of the posts and searched this forum and haven't found this topic covered.
My question is: How do I create a port in the middle of a microstrip trace in Ansoft's PlanarEM?
I'm designing a circuit using transistors in an SOT-343 package. The footprints in Ansoft's library have the ports of the transistors in the middle of the attached pads. Even without the pads(i.e. if I delete them), the port is still underneath the pin, rightly so. The problem I have is that in order to have the transistor line up where it should be placed on the EM model of the trace, there needs to be a port in the middle of the trace. On the ends of the line, edge ports work fine. The end of the line matches up with the port. In my configuration, a trace runs from one pin(A), underneath the chip, underneath another pin(B), and out to a pin on a second transistor(C) . Pin B is where I'm having a problem. I can simulate two traces (from A to B and from B to C) but then everything must be manually aligned in the layout editor, and I'm not sure it's the best way to do it. I've read some about gap sources, but I'm not too sure any voids created in the line would work. The circuit is of a high-frequency nature (of course), but also requires a DC path.
Thanks, any help would be appreciated.
-John-
My question is: How do I create a port in the middle of a microstrip trace in Ansoft's PlanarEM?
I'm designing a circuit using transistors in an SOT-343 package. The footprints in Ansoft's library have the ports of the transistors in the middle of the attached pads. Even without the pads(i.e. if I delete them), the port is still underneath the pin, rightly so. The problem I have is that in order to have the transistor line up where it should be placed on the EM model of the trace, there needs to be a port in the middle of the trace. On the ends of the line, edge ports work fine. The end of the line matches up with the port. In my configuration, a trace runs from one pin(A), underneath the chip, underneath another pin(B), and out to a pin on a second transistor(C) . Pin B is where I'm having a problem. I can simulate two traces (from A to B and from B to C) but then everything must be manually aligned in the layout editor, and I'm not sure it's the best way to do it. I've read some about gap sources, but I'm not too sure any voids created in the line would work. The circuit is of a high-frequency nature (of course), but also requires a DC path.
Thanks, any help would be appreciated.
-John-