Verilog转schematic时,出现error
时间:10-02
整理:3721RD
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Verilog转schematic时,出现error:
Error: Can't connect "VSS!" ("[@VSS!:%:VSS!]") to non-inherited terminal "VSS!".
Error: Can't connect "VDD!" ("[@VDD!:%:VDD!]") to non-inherited terminal "VDD!".
设置:Power Net Name:VDD!,Ground Net Name:GND!(工具默认设置)
也试了这设置:Power Net Name:VDD,Ground Net Name:VSS(调用标准单元的电源 地命名)
还是出现上面的error
麻烦大家帮看看,谢哈
Error: Can't connect "VSS!" ("[@VSS!:%:VSS!]") to non-inherited terminal "VSS!".
Error: Can't connect "VDD!" ("[@VDD!:%:VDD!]") to non-inherited terminal "VDD!".
设置:Power Net Name:VDD!,Ground Net Name:GND!(工具默认设置)
也试了这设置:Power Net Name:VDD,Ground Net Name:VSS(调用标准单元的电源 地命名)
还是出现上面的error
麻烦大家帮看看,谢哈
说的哪个阶段呢,是.v转.cdl或者.sp吗?