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锁相环系统仿真用什么软件?

时间:10-02 整理:3721RD 点击:
请教各位,锁相环的system level和transistor level 仿真,有什么不同?
做PLL的流程 是不是要先做system level仿真,然后在设计transistor level电路?
做system level仿真,请推荐一下,用什么软件比较主流,资料多?
本人是PLL的入门新手,请多指点。谢谢大家!

搭车同问。

可以直接去下matlab提供的matlab模型,用verilog-A的话进行transistor的混合仿真比较方便

Hi, Calven,
请问在哪里下载?可否提供链接?谢谢!

我也是新手 听师兄说先要用matlab做仿真 再用 cadence 设计transistor level电路吧 貌似是的

because the number of MOS devices in PLL is very large(if your PLL is complex
especialy for multistage ring vco and divider ckt)
if you do not run pll behavior simulation firstly then it will take
very long time to run simulation in hspice and if
the result is error then you will try again and it takes a lot of time and try and error
(2)the PLL behavior simulation can be done with simulink and matlab equation
matlab equation can be used to simulate the phase margin of pll(bode plot diagram)
the simulink behavior of pll can be used to run trainsinet behavior simulation of pll.
The purpose of behavior simulation is to help you quickly determine vco gain ,charge pump current ,loop filter value to find out if your pll locking time ,stablity etc can meet the spec
(3)The PLL transistor level simulation can be done with hspice (the most accurate)
but it will take a lot of time(such as several days)
so you can run the PLL transistor level ckt with nanosim(it is faster than hspice but it will
take less time (such as several hours)than hspice but the accuracy of nanosim is not as hspice
Any way the final result must be verfied with hspice
but you can do pll behavior simulation firstly with matlab ,simulink then use nanosim to do PLL transistor level cktto get roughly result and finally using hspice to get the most accurate result!

6# kmchen3089

6楼kmchen3089 大哥讲的非常好,
第一步,利用子电路模块的“行为级模型”快速进行行为级仿真,确定子电路模块的规格;
第二部,根据上一步得到的规格设计相应子电路模块,并进行电路级仿真。
感觉跟设计Delta-Sigma MOD步骤非常相似,小弟估计如何推导或建立“行为模型”应该是行为级仿真的重中之重的步骤吧(考虑点:模型复杂度适当,一方面使仿真时间缩短;另一方面保证足够的精度),不知大哥能不能推荐个经典pll建模的文献呢?谢谢了大哥。

哦,明白了

6楼大哥,谢了

kmchen3089 ,讲的非常好,能否介绍一些具体的设计资料(examples, tutorial or paper)给我们?再次感谢!

打车同问 PLL正在仿真中

behavior verilog a and use hsim to simulate
transistor level simulatiion hsim

学习……

同问,谢谢!
最近正在仿真PLL

hao a xiexie a

hsim for lock time simulation

hspice for final detail simulation

学习了,很好的资料,谢谢

学习了

新手同问啊啊

六楼说的很好啊有没有资料推荐 啊这几个月想学学PLL主要是仿真这一块

6楼讲的很好

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