CP的mismatch对phase noise的影响,求解
First, I want to correct a concept misunderstanding here, spur is one type of phase noise, which results in phase error and in another word, jitter.
Ok, before we walk through your case, may I know how do you test the PLL and the reason you make the conclusion that cp dominate your phase noise measurement.
Couple of things to try, increase cp current, move output freq to another channel, for example
Bottom line is, CP mismatch only create spur, and even with 20% mismatch, it should not dominate your phase noise performance. So, I doubt about your test flow and how you draw the conclusion
测试的确发现CP mismatch时,spur会上来,并且phase noise 会急剧下降,我做的是40GHZ 的PLL,尤其是CPmismatch较严重的时候。以前对PLL的理解是CP的mismatch仅仅会造成reference spur的上升,不会造成phasenoise的下降,测试了才知道不是那么一回事,测试应该不会有问题吧
who is correct?