Sigma-Delta ADC中放大器带宽与采样频率

关键词 settling time
google

for DT delta-sigma, it's normal, even higher
for CT delta-sigma, GBW could be even lower than sampling frequency

Thanks a lot. I'm doing the behavior modelling of CT Sigma Delta now in SIMULINK. How to set a proper GBW for amplifiers in integrator? According to the SNR results?

看了以后感觉还是不理解啊...你这个建立时间和带宽有什么关系啊

yes

对于two path或complex 不完全建立会降低IRR

求 推荐一本比较经典的sigma delta ADC书。

depends on which type of delta-sigma u want to design
If you want to design DT delta-sigma, I highly recommend "Understanding Delta-Sigma Modulators" by Schreier
If you want to design CT delta-sigma, "Continuous-time Delta-Sigma Modulaors" by Ortmanns
If you are a green hand on delta-sigma,reading "Understanding Delta-Sigma Modulators" as a beginning

谢谢，Understanding Delta-Sigma Modulators这本书论坛没有啊，哪里去搞?

谢谢，Understanding Delta-Sigma Modulators这本书论坛没有啊，哪里去搞?

Sorry, the name is wrong. It should be "Understanding Delta Sigma Data Converters".

thanks a lot

"Continuous-time Delta-Sigma Modulaors" by Ortmanns 此书论坛里面也没有啊

Continuous time sigma delta AD conversion

Thanks

sampling ！