UCD3138 T24使用的疑惑

在UCD3138 Technical Reference Manual文档中，第397页中间部分

The clock then runs through a prescaler. The prescaler is controlled by an 8 bit register. Register values
from 0 to 255 correspond to dividing the clock by 1 to 256.

第406页Table 11-2中

PRESCALE  reset value 0

Defines the prescaler value used to select the 24-bit counter resolution. The
minimum divider ratio is 4, prescaler value less than 3 defaults to 3.

想问一下T24的分频值是1~256还是4~256？

Hi Barry,

   抱歉回复有点晚,和美国BU同事确认了，是1~256，请知悉.

“ It's a divide by 1”

Hi Curly

Thanks.