微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 硬件电路设计 > TI模拟硬件电路设计 > dp83640 秒脉冲输出问题

dp83640 秒脉冲输出问题

时间:10-02 整理:3721RD 点击:

dp83640配置秒脉冲输出后,当校时范围比较大时,会出现秒脉冲消失的情况。此时,再次配置秒脉冲不能恢复 ...

各位大侠有知道原因的吗?

uint8 DP83640_SetPPS(uint32 PhyAddr, uint8 GPIO_SEL)
{
    uint16 ptp_trig = 0, val = 0;

    uint32 sec, nsec, pwidth;

    ptp_trig =
            TRIG_WR | (GPIO_SEL & TRIG_CSEL_MASK) << TRIG_CSEL_SHIFT
                    | (GPIO_SEL & TRIG_GPIO_MASK) << TRIG_GPIO_SHIFT
                    | TRIG_PER
                    | TRIG_PULSE;

    val = (GPIO_SEL & TRIG_SEL_MASK) << TRIG_SEL_SHIFT;

    /*if (1)
    {
        //val |= TRIG_DIS;

        //DP83640_WriteReg(PhyAddr, PAGE5, PTP_TRIG, ptp_trig);

        DP83640_WriteReg(PhyAddr, PAGE4, PTP_CTL, (val|TRIG_DIS));
    }*/

    DP83640_WriteReg(PhyAddr, PAGE5, PTP_TRIG, ptp_trig);

    sec = 0;
    nsec = 1000000000UL;
    pwidth = 1 * 2000000000UL;
    pwidth += 0;
    pwidth /= 2;

    /*load trigger*/
    val |= TRIG_LOAD;

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_CTL, val);

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, nsec & 0xffff); /* ns[15:0] */

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, nsec >> 16); /* ns[31:16] */

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, sec & 0xffff); /* sec[15:0] */

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, pwidth & 0xffff);/* ns[15:0] */

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */

    if(GPIO_SEL < 2)
    {
        DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, pwidth & 0xffff);// ns[15:0]

        DP83640_WriteReg(PhyAddr, PAGE4, PTP_TDR, pwidth >> 16); // ns[31:16]
    }

    /*enable trigger*/
    val &= ~TRIG_LOAD;

    val |= TRIG_EN;

    DP83640_WriteReg(PhyAddr, PAGE4, PTP_CTL, val);

    return 0;
}

这个问题比较专业,建议到我们的E2E上面去问一下,那里有我们产品线的同事做回复。http://e2e.ti.com/support/interface/ethernet/ 

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top