请高手指点：mini pcie设备的CLKREQ#信号该如何接？

如果需要使用CLKREQ功能的，从标准看Open drain，应该上拉。看到过有悬空不用这个功能的。
以下引用自 PCI Express Mini Card Electromechanical Specification Revision 1.0
3.2.4.2. CLKREQ# Signal
The CLKREQ# signal is an open drain, active low signal that is driven low by the PCI Express Mini Card function to request that the PCI Express reference clock be running in order to allow the PCI Express interface to send/receive data. For this revision of the specification, this signal should 20 always be asserted by PCI Express-based add-in cards and it is acceptable to simply tie this output low (using ground). Add-in cards that do not implement a PCI Express interface shall leave this output unconnected on the card.

你做Mini PCIe插卡还是主机（RC还是EP）？
两个不一样。
RC应该是上拉。如果EP一直需要提供时钟，EP应该是下拉。
如果需要低功耗设计，CLKREQ应该需要时置低，不需要时为1。即可以动态的。
1. Summary of the Functional Changes
This change request proposes to add functionality to the existing CLKREQ# signal on the Mini Card interface. The purpose of this change is to define an enhanced PCI Express clock management protocol that will provide power saving benefit during periods when PCI Express links are idle.
2. Benefits as a Result of the Changes
This feature extension will enable the development of lower power modules and systems. The actual amount of power benefit will vary by application and implementation although the potential collective benefit across all of the applications potentially running in a single system is on the order
of 100’s of mW during periods of idle time on PCI Express links.

多谢xiangxiadage大侠指点，受用了！
还想问一个问题：标准1.2中提到，电压稳定后PERST#最小1ms便释放了，为什么那么快，而标准1.0没有提及，PCIe标准中这个时间是100ms。会不会是标准少写了两个0？