DAC性能

同求啊同求。

你是哪种结构的DAC啊?没说清楚啊

电流舵结构

降低底噪，提高参考钟输入功率，提高位宽，优化输入匹配等

如果你电路没有问题，测试的方法也对，一般情况下提高电流源输出阻抗就会很明显的提高SFDR

    非常感谢

    非常感谢！

下载得怎样啊

增么增大输出阻抗提高不是很多啊?还有其他的方法么?谢谢！

你好，请问你知道DAC一般采用什么软件测试其SFDR、ENOB么?谢谢

current type DAC MSB thermal meter code (with DEM algorithm), LSB binary code, care layout matching, add a cascode or cascade MOS (or MOS with a OP feedback (source to gate, must wide band) to increase output impedance)

    layout电流阵列您是怎么样设计布局的呢? 有这方面的资料吗? 谢谢您的回复！

For MSB thermalmeter code current mirror array, if you do not use DEM algorithm. Matching is the important issue & control signal arrvial time should be the same, so your control signal should be register out which use APR tool to balance the clock tree edge.
For MSB thermalmeter code without DEM algorithm, the matchng is more important (unit dac turn on sequence should be centered, keep their average value at center, eliminate the process gradient ) & control signal arrvial timing should be balanced (for DEM & no DEM).

Control signal arrvial time take 2 parts: 1. source signal trigger time. Use register out & APR tool to solve this. 2.wire delay time: keep every control signal wire line with the same length can eliminish this.
Maybe you can usa analog background calibration when your DAC operate.
Or you can use foreground calbration by a high resolution SDM ADC, then calibre MSB dac with smaller calibration DAC array.
For LSB binary code DAC, you should also use thermalmeter code element just connect them as binary connect.
For current DAC layout floor plan,sorry I have no experience. But you shoule consider the DAC matching , dummy DAC should around them. Power supply metal (use high leve metal, ex: top metal) should be wide & use matrix power feed net work (VDD & GND).Control signal delay balance should be consider (with the same length, depend on your dac size, wire delay time approximate to (r*c*l^2)/2) r: resistance of per square, c: capacitance per unit area, l: wire length.
JSSC paper is suggest to read, paper of ADI & Cirrus logic is  the best.
Read paper & book is important, but thinking by yourself is more important.

这很模糊的问题。要看你的电路特性决定改善方法。

Thank you very much！
Hope to talk more with you！

    Welcome for your discuss.  I donot real type out a current DAC all I know about the current DAC is from books & IEEE papers, but I can give you some suggest from my experience.  

How about using steering DAC?
Issue about DAC is the ratio of elements..

DAC性能指标—SFDR

不错不错

thanks for your sharing