cadence AMS仿真问题求助
时间：10-02
整理：3721RD
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用irun的脚本方式运行，跑仿真出现以下错误！
Discipline resolution Pass...
.vop( net9 ), .vss( cds_globals.\gnd！ ), .ck2( net028 ), .ck1( net11 ),
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ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|53): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
.vop( net9 ), .vss( cds_globals.\gnd！ ), .ck2( net028 ), .ck1( net11 ),
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ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|68): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
net022[0:15] ), .filter_in( { cds_globals.\gnd！ ,net9 } ), .reset(
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ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,27|47): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
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ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,28|4): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
请知道解决办法的高手赐教！
Discipline resolution Pass...
.vop( net9 ), .vss( cds_globals.\gnd！ ), .ck2( net028 ), .ck1( net11 ),
|
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|53): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
.vop( net9 ), .vss( cds_globals.\gnd！ ), .ck2( net028 ), .ck1( net11 ),
|
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,20|68): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I6.
net022[0:15] ), .filter_in( { cds_globals.\gnd！ ,net9 } ), .reset(
|
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,27|47): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
|
ncelab: *E,CUVNCM (./ihnl/li/mixsim/schematic/verilog.vams,28|4): No connection module found:Need an input port of continuous discipline electrical, and an output port of discrete discipline logic, at instance mixsim.I1.
net17 ), .clk( net017 ) );
请知道解决办法的高手赐教！
没有加connect rules
adding the connect rules "ConnRules_18V_fll_fast".