职业机会 Analog/mixed signal IC design 知名美资企业
时间：10-02
整理：3721RD
点击：
Job 1 Title： Sr. Staff engineer, Analog/mixed signal IC design (wireless team)
Main Responsibilities：
1.Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES
2.Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS)
3.Layout design
4.Block/chip level verification (LVS, DRC, LPE)
5.Design review
6.Chip level integration
7.Test, characterization, debug
8.Close work with US team including occasional travel
9.Helping other team members with their design/schedule
Job Requirements：
1.MSEE with at least 10 years of industry experience
2.Previous leadership experience is a plus
3.Deep understanding of fundamental analog techniques
4.Experience with low-power analog design in deep submicron CMOS
5.Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso
6.Hands-on experience in analog layout design and verification
7.Knowledge of Skill, Matlab & verilog programming
8.Experience with high volume IC manufacturing is a plus
9.Hands-on experience with lab equipment
10.Occasional travel to US for technical training/design review/product test
Job 2 Title： Staff engineer, Analog/mixed signal IC design (wireless team)
Main Responsibilities：
1.Independent design of analog blocks such as bandgap reference, voltage regulator, bias and understanding of other blocks such as PLL, ADC, DAC, SERDES
2.Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS)
3.Layout design
4.Block/chip level verification (LVS, DRC, LPE)
5.Design review
6.Chip level integration
7.Test, characterization, debug
8.Close work with US team including occasional travel
Job Requirements：
1.MSEE with at least 5 years of industry experience
2.Good understanding of fundamental analog techniques
3.Experience with low-power analog design in deep submicron CMOS
4.Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso
5.Hands-on experience in analog layout design and verification
6.Knowledge of Skill, Matlab & verilog programming is a plus
7.Experience with high volume IC manufacturing is a plus
8.Hands-on experience with lab equipment
9.Occasional travel to US for technical training/design review/product test
Main Responsibilities：
1.Technical lead of the wireless team in China designing analog blocks such as PLL, ADC, DAC, Filter, Regulator, SERDES
2.Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS)
3.Layout design
4.Block/chip level verification (LVS, DRC, LPE)
5.Design review
6.Chip level integration
7.Test, characterization, debug
8.Close work with US team including occasional travel
9.Helping other team members with their design/schedule
Job Requirements：
1.MSEE with at least 10 years of industry experience
2.Previous leadership experience is a plus
3.Deep understanding of fundamental analog techniques
4.Experience with low-power analog design in deep submicron CMOS
5.Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso
6.Hands-on experience in analog layout design and verification
7.Knowledge of Skill, Matlab & verilog programming
8.Experience with high volume IC manufacturing is a plus
9.Hands-on experience with lab equipment
10.Occasional travel to US for technical training/design review/product test
Job 2 Title： Staff engineer, Analog/mixed signal IC design (wireless team)
Main Responsibilities：
1.Independent design of analog blocks such as bandgap reference, voltage regulator, bias and understanding of other blocks such as PLL, ADC, DAC, SERDES
2.Corner Simulations (Cadence, Spectre, Ocean, Monte Carlo, ADS)
3.Layout design
4.Block/chip level verification (LVS, DRC, LPE)
5.Design review
6.Chip level integration
7.Test, characterization, debug
8.Close work with US team including occasional travel
Job Requirements：
1.MSEE with at least 5 years of industry experience
2.Good understanding of fundamental analog techniques
3.Experience with low-power analog design in deep submicron CMOS
4.Experience in Cadence Spectre, SpectreRF, AMS and Virtuoso
5.Hands-on experience in analog layout design and verification
6.Knowledge of Skill, Matlab & verilog programming is a plus
7.Experience with high volume IC manufacturing is a plus
8.Hands-on experience with lab equipment
9.Occasional travel to US for technical training/design review/product test
如对此职位感兴趣可加MSN:jennifer_wxx@msn.cn 了解联系情况，
或发送邮件至：job606@green-information.com
帮顶小编~看来IC设计还是很有发展前途的
非常谢谢