vcs 编译问题

各位大侠，小弟的Makefile内容如下：
vcs_comp=vlogan +v2k $(inc_path) -nc -work work
comp-vcs:
$(vcs_comp) $(src_path)/cnt.v
$(vcs_comp) $(src_path)/test.v
vcs: comp-vcs
vcswork.test -o ./simv_mx -l comp.log
#vcs +neg_tchk -negdelay -notice -debug work.test -o ./simv_mx -l comp.log
run-vcs: vcs
./simv_max
vcs-clean:
@if [ -e work ]; then \
rm -rf work; \
fi
@if [ -e comp.log ]; then \
rm -rf comp.log; \
fi
编译两个.v文件。
再执行make vcs时，出现一下问题：
vlogan +v2k +incdir+../src -nc -work work ../src/cnt.v
Parsing design file '../src/cnt.v'
vlogan +v2k +incdir+../src -nc -work work ../src/test.v
Parsing design file '../src/test.v'
vcswork.test -o ./simv_mx -l comp.log
Chronologic VCS (TM)
Version C-2009.06 -- Mon Dec5 14:03:53 2016
Copyright (c) 1991-2008 by Synopsys Inc.
ALL RIGHTS RESERVED
This program is proprietary and confidential information of Synopsys Inc.
and may be used and disclosed only as authorized in a license agreement
controlling such use and disclosure.

Error-[SFCOR] Source file cannot be opened
Source file "work.test" cannot be opened for reading due to 'No such file or
directory'.
Please fix above issue and compile agAIn.


1 error
cpu time: .342 seconds to compile
make: *** [vcs] Error 255
各位大神如何解决?谢谢

Source file cannot be opened

不是找不到文件，是无法创建work库

需要在本地建立一个synopsys_sim.setup文件，内容如下：
WORK > DEFAULT
DEFAULT : ./work
好像就行了