MTK6753平台升级问题
时间：10-02
整理：3721RD
点击：
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seCLIb_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xE\0x80\0x80\0x80\0x80\0x00\0x00\0x80\0x00\0x00\0x80\0x80\0x80\0x80\0x80\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x80\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x80\0x80\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x80\0x00\0x80\0x80\0x00Output Log To UART 1
InitLog: Nov 30 2016 11:01:52 26000000 [GBH]
Orit GPIO mode reg is 0
DA build time : Nov 30 2016 11:01:50
DA arg_size=0x8F4, flags=0x0,
[DDR Reserve] ddr reserve mode not be enabled yet
RGU rgu_release_rg_dramc_conf_iso:mtk_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_sref:MTK_WDT_DEBUG_CTL(590200F3)
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DA do releasing DRAM.
RGU rgu_release_rg_dramc_conf_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_sref:MTK_WDT_DEBUG_CTL(590200F3)
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
Defalt reg_wdt_mode value is 0x0
After Disable WDT, reg_wdt_mode value is 0x0
[msdc_init]: msdc0 Host controller intialization start in DA
[SD0] Pins mode(1), none(0), down(1), up(2), keep(3)
[SD0] Pins mode(2), none(0), down(1), up(2), keep(3)
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) div(385) DS(0) RS(0)
[msdc_init]: msdc0 Host controller intialization done in DA
dump CID: 15010051, dump CID: 5831334D, dump CID: 42070CE0, dump CID: D8DF83BF, 15010051, 5831334D, 42070CE0, D8DF83BF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, EMMC ID 51000115 4D333158 E00C0742 BF37DFD8
Config PLL use DA's setting.
SAL_PLL_Setup(2 218574 0)
---SAL_PLL_Configure---
[PWRAP] pwrap_init_DA
The value of the INFRACFG_AO_BASE+ 0x48 is: 0
[PWRAP] pwrap_init
[PWRAP] start reset wrapper
[PWRAP] the reset register =80
[PWRAP] PMIC_WRAP_STAUPD_GRPEN =0x0,it should be equal to 0xc
[PWRAP] mt_pwrap_init---- debug3
[PWRAP] mt_pwrap_init---- debug4
[PWRAP] mt_pwrap_init---- debug5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=0 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=8 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=9 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=10 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=11 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=12 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=13 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=14 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=15 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=16 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=17 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=18 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=19 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=20 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=21 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=22 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=23 rdata=6A97
[PWRAP] mt_pwrap_init---- debug6
[PWRAP] _pwrap_init_reg_clock
[PWRAP] have cipher
[PWRAP] mt_pwrap_init---- debug7
[PWRAP] mt_pwrap_init---- debug8
[PWRAP] mt_pwrap_init---- debug9
[PWRAP] mt_pwrap_init---- debug10
[PWRAP] mt_pwrap_init---- debug11 with ADC &6328 adc
[PWRAP] mt_pwrap_init---- debug12 ok
[PWRAP] mt_pwrap_init---- debug13
[PWRAP] mt_pwrap_init---- debug14
[PWRAP] mt_pwrap_init---- debug15,302
[PWRAP] after MT6328 pwrap_write
[PWRAP] write MT6328 Test pass
[PWRAP] Read 6328 Test pass,return_value=0
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic_init] Preloader Start,MT6328 CHIP Code = 0x2820
[6328]e-data[0x0]=0x1F
[6328]e-data[0x1]=0x114C
[6328]e-data[0x2]=0x8208
[6328]e-data[0x3]=0X20
[6328]e-data[0x4]=0x0
[6328]e-data[0x5]=0x3C0
[6328]e-data[0x6]=0x3C
[6328]e-data[0x7]=0x400
[6328]e-data[0x8]=0xE000
[6328]e-data[0x9]=0x637E
[6328]e-data[0xA]=0x0
[6328]e-data[0xB]=0x0
[6328]e-data[0xC]=0xFA00
[6328]e-data[0xD]=0x71
[6328]e-data[0xE]=0x0
[6328]e-data[0xF]=0x0
[6328]e-data[0x10]=0xEB00
[6328]e-data[0x11]=0x1
[6328]e-data[0x12]=0x0
[6328]e-data[0x13]=0x0
[6328]e-data[0x14]=0x0
[6328]e-data[0x15]=0x0
[6328]e-data[0x16]=0x0
[6328]e-data[0x17]=0xCB0
[6328]e-data[0x18]=0x8046
[6328]e-data[0x19]=0xA724
[6328]e-data[0x1A]=0x9893
[6328]e-data[0x1B]=0xAFA
[6328]e-data[0x1C]=0x0
[6328]e-data[0x1D]=0x0
[6328]e-data[0x1E]=0x0
[6328]e-data[0x1F]=0x0
[pmic_6328_efuse_management]4.27 efuse_data[0x11]:0x1
[pmic_6328_efuse_management]4.27 efuse_data[0x11][448:472]:0x1
[pmic_init] Done...................
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0x48, con = 0xA081, osc32con = 0x1200, sec = 0x811C, yea = 0x102
rtc_first_boot_init
[RTC] rtc cbusy time out！
rtc_recovery_flow
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
ASSERT(./platform/mt6735/misc/rtc.c, 113)
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seCLIb_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xEA000008'
<ASSERT> seclib_dl.c:line 62 0
PL fatal error...
key 10 is pressed
[LIB] invalid susbdl config '0xE\0x80\0x80\0x80\0x80\0x00\0x00\0x80\0x00\0x00\0x80\0x80\0x80\0x80\0x80\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x00\0x80\0x00\0x80\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x80\0x80\0x80\0x00\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x00\0x80\0x00\0x00\0x00\0x80\0x00\0x80\0x80\0x00Output Log To UART 1
InitLog: Nov 30 2016 11:01:52 26000000 [GBH]
Orit GPIO mode reg is 0
DA build time : Nov 30 2016 11:01:50
DA arg_size=0x8F4, flags=0x0,
[DDR Reserve] ddr reserve mode not be enabled yet
RGU rgu_release_rg_dramc_conf_iso:mtk_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_sref:MTK_WDT_DEBUG_CTL(590200F3)
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DA do releasing DRAM.
RGU rgu_release_rg_dramc_conf_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_iso:MTK_WDT_DEBUG_CTL(590200F3)
RGU rgu_release_rg_dramc_sref:MTK_WDT_DEBUG_CTL(590200F3)
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
DDR is in self-refresh. 200F3
Defalt reg_wdt_mode value is 0x0
After Disable WDT, reg_wdt_mode value is 0x0
[msdc_init]: msdc0 Host controller intialization start in DA
[SD0] Pins mode(1), none(0), down(1), up(2), keep(3)
[SD0] Pins mode(2), none(0), down(1), up(2), keep(3)
[SD0] Bus Width: 1
[SD0] SET_CLK(260kHz): SCLK(259kHz) MODE(0) DDR(0) div(385) DS(0) RS(0)
[msdc_init]: msdc0 Host controller intialization done in DA
dump CID: 15010051, dump CID: 5831334D, dump CID: 42070CE0, dump CID: D8DF83BF, 15010051, 5831334D, 42070CE0, D8DF83BF, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, EMMC ID 51000115 4D333158 E00C0742 BF37DFD8
Config PLL use DA's setting.
SAL_PLL_Setup(2 218574 0)
---SAL_PLL_Configure---
[PWRAP] pwrap_init_DA
The value of the INFRACFG_AO_BASE+ 0x48 is: 0
[PWRAP] pwrap_init
[PWRAP] start reset wrapper
[PWRAP] the reset register =80
[PWRAP] PMIC_WRAP_STAUPD_GRPEN =0x0,it should be equal to 0xc
[PWRAP] mt_pwrap_init---- debug3
[PWRAP] mt_pwrap_init---- debug4
[PWRAP] mt_pwrap_init---- debug5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=0 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=8 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=9 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=10 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=11 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=12 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=13 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=14 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=15 rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=16 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=17 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=18 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=19 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=20 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=21 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=22 rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test of MT6328] tuning,index=23 rdata=6A97
[PWRAP] mt_pwrap_init---- debug6
[PWRAP] _pwrap_init_reg_clock
[PWRAP] have cipher
[PWRAP] mt_pwrap_init---- debug7
[PWRAP] mt_pwrap_init---- debug8
[PWRAP] mt_pwrap_init---- debug9
[PWRAP] mt_pwrap_init---- debug10
[PWRAP] mt_pwrap_init---- debug11 with ADC &6328 adc
[PWRAP] mt_pwrap_init---- debug12 ok
[PWRAP] mt_pwrap_init---- debug13
[PWRAP] mt_pwrap_init---- debug14
[PWRAP] mt_pwrap_init---- debug15,302
[PWRAP] after MT6328 pwrap_write
[PWRAP] write MT6328 Test pass
[PWRAP] Read 6328 Test pass,return_value=0
[PMIC_WRAP]wrap_init pass,the return value=0.
[pmic_init] Preloader Start,MT6328 CHIP Code = 0x2820
[6328]e-data[0x0]=0x1F
[6328]e-data[0x1]=0x114C
[6328]e-data[0x2]=0x8208
[6328]e-data[0x3]=0X20
[6328]e-data[0x4]=0x0
[6328]e-data[0x5]=0x3C0
[6328]e-data[0x6]=0x3C
[6328]e-data[0x7]=0x400
[6328]e-data[0x8]=0xE000
[6328]e-data[0x9]=0x637E
[6328]e-data[0xA]=0x0
[6328]e-data[0xB]=0x0
[6328]e-data[0xC]=0xFA00
[6328]e-data[0xD]=0x71
[6328]e-data[0xE]=0x0
[6328]e-data[0xF]=0x0
[6328]e-data[0x10]=0xEB00
[6328]e-data[0x11]=0x1
[6328]e-data[0x12]=0x0
[6328]e-data[0x13]=0x0
[6328]e-data[0x14]=0x0
[6328]e-data[0x15]=0x0
[6328]e-data[0x16]=0x0
[6328]e-data[0x17]=0xCB0
[6328]e-data[0x18]=0x8046
[6328]e-data[0x19]=0xA724
[6328]e-data[0x1A]=0x9893
[6328]e-data[0x1B]=0xAFA
[6328]e-data[0x1C]=0x0
[6328]e-data[0x1D]=0x0
[6328]e-data[0x1E]=0x0
[6328]e-data[0x1F]=0x0
[pmic_6328_efuse_management]4.27 efuse_data[0x11]:0x1
[pmic_6328_efuse_management]4.27 efuse_data[0x11][448:472]:0x1
[pmic_init] Done...................
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] bbpu = 0x48, con = 0xA081, osc32con = 0x1200, sec = 0x811C, yea = 0x102
rtc_first_boot_init
[RTC] rtc cbusy time out！
rtc_recovery_flow
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
[RTC] get_frequency_meter: input=0x0, ouput=5
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
[RTC] get_frequency_meter: input=0x0, ouput=0
OSC32CON_ANALOG_SETTING = 0x7B00
[RTC] rtc cbusy time out！
ASSERT(./platform/mt6735/misc/rtc.c, 113)
路过，学习
路过学习了