MTK 6592界面概率性的卡死
时间：10-02
整理：3721RD
点击：
卡死的打印信息如下：
[ 51.701104]<1>.(1)[92:disp_worker_kth][DDP]error:disp_path_wait_frame_done timeout
[ 51.702061][DDP]clock:smi common, smi larb0, disp_color, disp_bls, disp_wDMA0, disp_rdma, disp_ovl, mutex_32k,
[ 51.703317]dsi_engine, dsi_digital,
[ 51.703763]<1>.(1)[92:disp_worker_kth][DDP]clock ok
[ 51.704370]<1>.(1)[92:disp_worker_kth][DDP]mutex:
[ 51.704985][DDP]mutex0, mode=dsi_vdo, module=(color,bls,rdma0,)
[ 51.705712][DDP]mutex1, mode=single, module=(ovl,wdma0,)
[ 51.706383]<1>.(1)[92:disp_worker_kth][DDP]ovl0: en=1, layer(1,1,1,1), bg_w=1024, bg_h=600, cur_x=0, cur_y=0, layer_pix_hit(1, 1, 1, 1)
[ 51.707901][DDP]ovl_status: addcon_idle,blend_idle,out_idle,rdma3_idle,rdma2_idle,rdma1_idle,rdma0_idle,
[ 51.709083][DDP]ovl_state_machine: wait_SOF
[ 51.709609]<1>.(1)[92:disp_worker_kth][DDP]ovl0: greq(ovl_req_smi)=0, valid(ovl_send_data)=0, ready(follow_engine_req_data)=0
[ 51.711034]<1>.(1)[92:disp_worker_kth][DDP]layer=0, w=1024, h=600, x=0, y=0, pitch=6400, addr=0x1013400, fmt=argb8888
[ 51.712380]<1>.(1)[92:disp_worker_kth][DDP]layer=1, w=1024, h=600, x=0, y=0, pitch=4096, addr=0X200000, fmt=argb8888
[ 51.713700]<1>.(1)[92:disp_worker_kth][DDP]layer=2, w=1024, h=65, x=0, y=0, pitch=4096, addr=0xa00000, fmt=argb8888
[ 51.715021]<1>.(1)[92:disp_worker_kth][DDP]layer=3, w=140, h=600, x=0, y=0, pitch=576, addr=0xb00000, fmt=argb8888
[ 51.716324]<1>.(1)[92:disp_worker_kth][DDP]wdma0: en=1, w=1024, h=600, CLIp=(0, 0, 1024, 600), pitch=(3072,0), addr=(0xbfc15000,0x0,0x0), fmt=rgb888
[ 51.717992]<1>.(1)[92:disp_worker_kth][DDP]wdma0: status=unknown, total_pix=614400, output_pixel=(l:44, p:44), input_pixel=(l:0, p:0)
[ 51.720403]<1>.(1)[1256erfServiceMana][power/cpufreq] limited_by_hevc！ g_limited_freq_by_hevc = 0
[ 51.722204]<1>.(1)[85:disp_config_upd][DDP]disp_irq_log_kthread_func dump intr register: disp_irq_log_module=1
[ 51.723459]<1>.(1)[85:disp_config_upd][DDP]===== DISP OVL Reg Dump: ============
[ 51.724379]<1>.(1)[85:disp_config_upd][DDP](000)O_STA =0x1e
[ 51.725127]<1>.(1)[85:disp_config_upd][DDP](004)O_INTEN =0xf
[ 51.725865]<1>.(1)[85:disp_config_upd][DDP](008)O_INTSTA =0x2
[ 51.726602]<1>.(1)[85:disp_config_upd][DDP](00C)O_EN =0x1
[ 51.727339]<1>.(1)[85:disp_config_upd][DDP](010)O_TRIG =0x0
[ 51.728077]<1>.(1)[85:disp_config_upd][DDP](014)O_RST =0x0
[ 51.728815]<1>.(1)[85:disp_config_upd][DDP](020)O_ROI_SIZE =0x2580400
[ 51.729672]<1>.(1)[85:disp_config_upd][DDP](024)O_DATAPATH_CON =0x40000000
[ 51.730539]<1>.(1)[85:disp_config_upd][DDP](028)O_ROI_BGCLR =0x0
[ 51.731498]<1>.(1)[85:disp_config_upd][DDP](02C)O_SRC_CON =0xf
[ 51.732286]<1>.(1)[85:disp_config_upd][DDP](030)O_L0_CON =0x20031ff
[ 51.733486]<1>.(1)[85:disp_config_upd][DDP](034)O_L0_SRCKEY =0x0
[ 51.734278]<1>.(1)[85:disp_config_upd][DDP](038)O_L0_SRC_SIZE =0x2580400
[ 51.735133]<1>.(1)[85:disp_config_upd]7[303:3C)O_L0_OFFSET =0x0
[ 51.735927]<1>.(1)[85:disp_config_upd][DDP](040)O_L0_ADDR =0x1013400
[ 51.737040]<1>.(1)[85:disp_config_upd][DDP](044)O_L0_PITCH =0x1900
[ 51.737866]<1>.(1)[85:disp_config_upd][DDP](0C0)O_R0_CTRL =0x10001
[ 51.738785]<1>.(1)[85:disp_config_upd][DDP](0C4)O_R0_MEM_START_TRIG =0x0
[ 51.739663]<1>.(1)[85:disp_config_upd][DDP](0C8)O_R0_MEM_GMC_SETTING =0x40402020
[ 51.740616]<1>.(1)[85:disp_config_upd][DDP](0CC)O_R0_MEM_SLOW_CON =0x0
[ 51.741527]<1>.(1)[85:disp_config_upd][DDP](0D0)O_R0_FIFO_CTRL =0x400000
[ 51.742378]<1>.(1)[85:disp_config_upd][DDP](050)O_L1_CON =0x20031ff
[ 51.743245]<1>.(1)[85:disp_config_upd][DDP](054)O_L1_SRCKEY =0x0
[ 51.744047]<1>.(1)[85:disp_config_upd][DDP](058)O_L1_SRC_SIZE =0x2580400
[ 51.744914]<1>.(1)[85:disp_config_upd][DDP](05C)O_L1_OFFSET =0x0
[ 51.745717]<1>.(1)[85:disp_config_upd][DDP](060)O_L1_ADDR =0x200000
[ 51.746574]<1>.(1)[85:disp_config_upd][DDP](064)O_L1_PITCH =0x1000
[ 51.747410]<1>.(1)[85:disp_config_upd][DDP](0E0)O_R1_CTRL =0x10001
[ 51.748332]<1>.(1)[85:disp_config_upd][DDP](0E4)O_R1_MEM_START_TRIG =0x0
[ 51.749210]<1>.(1)[85:disp_config_upd][DDP](0E8)O_R1_MEM_GMC_SETTING =0x40402020
[ 51.750164]<1>.(1)[85:disp_config_upd][DDP](0EC)O_R1_MEM_SLOW_CON =0x0
[ 51.751043]<1>.(1)[85:disp_config_upd][DDP](0F0)O_R1_FIFO_CTRL =0x400000
[ 51.752005]<1>.(1)[85:disp_config_upd][DDP](070)O_L2_CON =0x20031ff
[ 51.752858]<1>.(1)[85:disp_config_upd][DDP](074)O_L2_SRCKEY =0x0
[ 51.753649]<1>.(1)[85:disp_config_upd][DDP](078)O_L2_SRC_SIZE =0x410400
[ 51.754494]<1>.(1)[85:disp_config_upd][DDP](07C)O_L2_OFFSET =0x0
[ 51.755289]<1>.(1)[85:disp_config_upd][DDP](080)O_L2_ADDR =0xa00000
[ 51.756134]<1>.(1)[85:disp_config_upd][DDP](084)O_L2_PITCH =0x1000
[ 51.756960]<1>.(1)[85:disp_config_upd][DDP](100)O_R2_CTRL =0x10001
[ 51.757883]<1>.(1)[85:disp_config_upd][DDP](104)O_R2_MEM_START_TRIG =0x0
[ 51.758757]<1>.(1)[85:disp_config_upd][DDP](108)O_R2_MEM_GMC_SETTING =0x40402020
[ 51.759711]<1>.(1)[85:disp_config_upd][DDP](10C)O_R2_MEM_SLOW_CON =0x0
[ 51.760590]<1>.(1)[85:disp_config_upd][DDP](110)O_R2_FIFO_CTRL =0x400000
[ 51.761539]<1>.(1)[85:disp_config_upd][DDP](090)O_L3_CON =0x20031ff
[ 51.762387]<1>.(1)[85:disp_config_upd][DDP](094)O_L3_SRCKEY =0x0
[ 51.763179]<1>.(1)[85:disp_config_upd][DDP](098)O_L3_SRC_SIZE =0x258008c
[ 51.764036]<1>.(1)[85:disp_config_upd][DDP](09C)O_L3_OFFSET =0x0
[ 51.764827]<1>.(1)[85:disp_config_upd][DDP](0A0)O_L3_ADDR =0xb00000
[ 51.765674]<1>.(1)[85:disp_config_upd][DDP](0A4)O_L3_PITCH =0x240
[ 51.766487]<1>.(1)[85:disp_config_upd][DDP](120)O_R3_CTRL =0x10001
[ 51.767409]<1>.(1)[85:disp_config_upd][DDP](124)O_R3_MEM_START_TRIG =0x0
[ 51.768288]<1>.(1)[85:disp_config_upd][DDP](128)O_R3_MEM_GMC_SETTING =0x40402020
[ 51.769242]<1>.(1)[85:disp_config_upd][DDP](12C)O_R3_MEM_SLOW_CON =0x0
[ 51.770120]<1>.(1)[85:disp_config_upd][DDP](130)O_R3_FIFO_CTRL =0x400000
[ 51.771074]<1>.(1)[85:disp_config_upd][DDP](1C4)O_DEBUG_MON_SEL =0x0
[ 51.771947]<1>.(1)[85:disp_config_upd][DDP](1C4)O_R0_MEM_GMC_SETTING2 =0x0
[ 51.772823]<1>.(1)[85:disp_config_upd][DDP](1C8)O_R1_MEM_GMC_SETTING2 =0x0
[ 51.773702]<1>.(1)[85:disp_config_upd][DDP](1CC)O_R2_MEM_GMC_SETTING2 =0x0
[ 51.774581]<1>.(1)[85:disp_config_upd][DDP](1D0)O_R3_MEM_GMC_SETTING2 =0x0
[ 51.775460]<1>.(1)[85:disp_config_upd][DDP](240)O_FLOW_CTRL_DBG =0xf8c02
[ 51.776327]<1>.(1)[85:disp_config_upd][DDP](244)O_ADDCON_DBG =0xc000c000
[ 51.777224]<1>.(1)[85:disp_config_upd][DDP](248)O_OUTMUX_DBG =0x0
[ 51.778050]<1>.(1)[85:disp_config_upd][DDP](24C)O_R0_DBG =0x1b18f831
[ 51.778863]<1>.(1)[85:disp_config_upd][DDP](250)O_R1_DBG =0x10000001
[ 51.779676]<1>.(1)[85:disp_config_upd][DDP](254)O_R2_DBG =0x10000001
[ 51.780490]<1>.(1)[85:disp_config_upd][DDP](258)O_R3_DBG =0x13d3d3d1
[ 51.781320]<1>.(1)[85:disp_config_upd][DDP]TOTAL dump 66 registers
[ 51.701104]<1>.(1)[92:disp_worker_kth][DDP]error:disp_path_wait_frame_done timeout
[ 51.702061][DDP]clock:smi common, smi larb0, disp_color, disp_bls, disp_wDMA0, disp_rdma, disp_ovl, mutex_32k,
[ 51.703317]dsi_engine, dsi_digital,
[ 51.703763]<1>.(1)[92:disp_worker_kth][DDP]clock ok
[ 51.704370]<1>.(1)[92:disp_worker_kth][DDP]mutex:
[ 51.704985][DDP]mutex0, mode=dsi_vdo, module=(color,bls,rdma0,)
[ 51.705712][DDP]mutex1, mode=single, module=(ovl,wdma0,)
[ 51.706383]<1>.(1)[92:disp_worker_kth][DDP]ovl0: en=1, layer(1,1,1,1), bg_w=1024, bg_h=600, cur_x=0, cur_y=0, layer_pix_hit(1, 1, 1, 1)
[ 51.707901][DDP]ovl_status: addcon_idle,blend_idle,out_idle,rdma3_idle,rdma2_idle,rdma1_idle,rdma0_idle,
[ 51.709083][DDP]ovl_state_machine: wait_SOF
[ 51.709609]<1>.(1)[92:disp_worker_kth][DDP]ovl0: greq(ovl_req_smi)=0, valid(ovl_send_data)=0, ready(follow_engine_req_data)=0
[ 51.711034]<1>.(1)[92:disp_worker_kth][DDP]layer=0, w=1024, h=600, x=0, y=0, pitch=6400, addr=0x1013400, fmt=argb8888
[ 51.712380]<1>.(1)[92:disp_worker_kth][DDP]layer=1, w=1024, h=600, x=0, y=0, pitch=4096, addr=0X200000, fmt=argb8888
[ 51.713700]<1>.(1)[92:disp_worker_kth][DDP]layer=2, w=1024, h=65, x=0, y=0, pitch=4096, addr=0xa00000, fmt=argb8888
[ 51.715021]<1>.(1)[92:disp_worker_kth][DDP]layer=3, w=140, h=600, x=0, y=0, pitch=576, addr=0xb00000, fmt=argb8888
[ 51.716324]<1>.(1)[92:disp_worker_kth][DDP]wdma0: en=1, w=1024, h=600, CLIp=(0, 0, 1024, 600), pitch=(3072,0), addr=(0xbfc15000,0x0,0x0), fmt=rgb888
[ 51.717992]<1>.(1)[92:disp_worker_kth][DDP]wdma0: status=unknown, total_pix=614400, output_pixel=(l:44, p:44), input_pixel=(l:0, p:0)
[ 51.720403]<1>.(1)[1256erfServiceMana][power/cpufreq] limited_by_hevc！ g_limited_freq_by_hevc = 0
[ 51.722204]<1>.(1)[85:disp_config_upd][DDP]disp_irq_log_kthread_func dump intr register: disp_irq_log_module=1
[ 51.723459]<1>.(1)[85:disp_config_upd][DDP]===== DISP OVL Reg Dump: ============
[ 51.724379]<1>.(1)[85:disp_config_upd][DDP](000)O_STA =0x1e
[ 51.725127]<1>.(1)[85:disp_config_upd][DDP](004)O_INTEN =0xf
[ 51.725865]<1>.(1)[85:disp_config_upd][DDP](008)O_INTSTA =0x2
[ 51.726602]<1>.(1)[85:disp_config_upd][DDP](00C)O_EN =0x1
[ 51.727339]<1>.(1)[85:disp_config_upd][DDP](010)O_TRIG =0x0
[ 51.728077]<1>.(1)[85:disp_config_upd][DDP](014)O_RST =0x0
[ 51.728815]<1>.(1)[85:disp_config_upd][DDP](020)O_ROI_SIZE =0x2580400
[ 51.729672]<1>.(1)[85:disp_config_upd][DDP](024)O_DATAPATH_CON =0x40000000
[ 51.730539]<1>.(1)[85:disp_config_upd][DDP](028)O_ROI_BGCLR =0x0
[ 51.731498]<1>.(1)[85:disp_config_upd][DDP](02C)O_SRC_CON =0xf
[ 51.732286]<1>.(1)[85:disp_config_upd][DDP](030)O_L0_CON =0x20031ff
[ 51.733486]<1>.(1)[85:disp_config_upd][DDP](034)O_L0_SRCKEY =0x0
[ 51.734278]<1>.(1)[85:disp_config_upd][DDP](038)O_L0_SRC_SIZE =0x2580400
[ 51.735133]<1>.(1)[85:disp_config_upd]7[303:3C)O_L0_OFFSET =0x0
[ 51.735927]<1>.(1)[85:disp_config_upd][DDP](040)O_L0_ADDR =0x1013400
[ 51.737040]<1>.(1)[85:disp_config_upd][DDP](044)O_L0_PITCH =0x1900
[ 51.737866]<1>.(1)[85:disp_config_upd][DDP](0C0)O_R0_CTRL =0x10001
[ 51.738785]<1>.(1)[85:disp_config_upd][DDP](0C4)O_R0_MEM_START_TRIG =0x0
[ 51.739663]<1>.(1)[85:disp_config_upd][DDP](0C8)O_R0_MEM_GMC_SETTING =0x40402020
[ 51.740616]<1>.(1)[85:disp_config_upd][DDP](0CC)O_R0_MEM_SLOW_CON =0x0
[ 51.741527]<1>.(1)[85:disp_config_upd][DDP](0D0)O_R0_FIFO_CTRL =0x400000
[ 51.742378]<1>.(1)[85:disp_config_upd][DDP](050)O_L1_CON =0x20031ff
[ 51.743245]<1>.(1)[85:disp_config_upd][DDP](054)O_L1_SRCKEY =0x0
[ 51.744047]<1>.(1)[85:disp_config_upd][DDP](058)O_L1_SRC_SIZE =0x2580400
[ 51.744914]<1>.(1)[85:disp_config_upd][DDP](05C)O_L1_OFFSET =0x0
[ 51.745717]<1>.(1)[85:disp_config_upd][DDP](060)O_L1_ADDR =0x200000
[ 51.746574]<1>.(1)[85:disp_config_upd][DDP](064)O_L1_PITCH =0x1000
[ 51.747410]<1>.(1)[85:disp_config_upd][DDP](0E0)O_R1_CTRL =0x10001
[ 51.748332]<1>.(1)[85:disp_config_upd][DDP](0E4)O_R1_MEM_START_TRIG =0x0
[ 51.749210]<1>.(1)[85:disp_config_upd][DDP](0E8)O_R1_MEM_GMC_SETTING =0x40402020
[ 51.750164]<1>.(1)[85:disp_config_upd][DDP](0EC)O_R1_MEM_SLOW_CON =0x0
[ 51.751043]<1>.(1)[85:disp_config_upd][DDP](0F0)O_R1_FIFO_CTRL =0x400000
[ 51.752005]<1>.(1)[85:disp_config_upd][DDP](070)O_L2_CON =0x20031ff
[ 51.752858]<1>.(1)[85:disp_config_upd][DDP](074)O_L2_SRCKEY =0x0
[ 51.753649]<1>.(1)[85:disp_config_upd][DDP](078)O_L2_SRC_SIZE =0x410400
[ 51.754494]<1>.(1)[85:disp_config_upd][DDP](07C)O_L2_OFFSET =0x0
[ 51.755289]<1>.(1)[85:disp_config_upd][DDP](080)O_L2_ADDR =0xa00000
[ 51.756134]<1>.(1)[85:disp_config_upd][DDP](084)O_L2_PITCH =0x1000
[ 51.756960]<1>.(1)[85:disp_config_upd][DDP](100)O_R2_CTRL =0x10001
[ 51.757883]<1>.(1)[85:disp_config_upd][DDP](104)O_R2_MEM_START_TRIG =0x0
[ 51.758757]<1>.(1)[85:disp_config_upd][DDP](108)O_R2_MEM_GMC_SETTING =0x40402020
[ 51.759711]<1>.(1)[85:disp_config_upd][DDP](10C)O_R2_MEM_SLOW_CON =0x0
[ 51.760590]<1>.(1)[85:disp_config_upd][DDP](110)O_R2_FIFO_CTRL =0x400000
[ 51.761539]<1>.(1)[85:disp_config_upd][DDP](090)O_L3_CON =0x20031ff
[ 51.762387]<1>.(1)[85:disp_config_upd][DDP](094)O_L3_SRCKEY =0x0
[ 51.763179]<1>.(1)[85:disp_config_upd][DDP](098)O_L3_SRC_SIZE =0x258008c
[ 51.764036]<1>.(1)[85:disp_config_upd][DDP](09C)O_L3_OFFSET =0x0
[ 51.764827]<1>.(1)[85:disp_config_upd][DDP](0A0)O_L3_ADDR =0xb00000
[ 51.765674]<1>.(1)[85:disp_config_upd][DDP](0A4)O_L3_PITCH =0x240
[ 51.766487]<1>.(1)[85:disp_config_upd][DDP](120)O_R3_CTRL =0x10001
[ 51.767409]<1>.(1)[85:disp_config_upd][DDP](124)O_R3_MEM_START_TRIG =0x0
[ 51.768288]<1>.(1)[85:disp_config_upd][DDP](128)O_R3_MEM_GMC_SETTING =0x40402020
[ 51.769242]<1>.(1)[85:disp_config_upd][DDP](12C)O_R3_MEM_SLOW_CON =0x0
[ 51.770120]<1>.(1)[85:disp_config_upd][DDP](130)O_R3_FIFO_CTRL =0x400000
[ 51.771074]<1>.(1)[85:disp_config_upd][DDP](1C4)O_DEBUG_MON_SEL =0x0
[ 51.771947]<1>.(1)[85:disp_config_upd][DDP](1C4)O_R0_MEM_GMC_SETTING2 =0x0
[ 51.772823]<1>.(1)[85:disp_config_upd][DDP](1C8)O_R1_MEM_GMC_SETTING2 =0x0
[ 51.773702]<1>.(1)[85:disp_config_upd][DDP](1CC)O_R2_MEM_GMC_SETTING2 =0x0
[ 51.774581]<1>.(1)[85:disp_config_upd][DDP](1D0)O_R3_MEM_GMC_SETTING2 =0x0
[ 51.775460]<1>.(1)[85:disp_config_upd][DDP](240)O_FLOW_CTRL_DBG =0xf8c02
[ 51.776327]<1>.(1)[85:disp_config_upd][DDP](244)O_ADDCON_DBG =0xc000c000
[ 51.777224]<1>.(1)[85:disp_config_upd][DDP](248)O_OUTMUX_DBG =0x0
[ 51.778050]<1>.(1)[85:disp_config_upd][DDP](24C)O_R0_DBG =0x1b18f831
[ 51.778863]<1>.(1)[85:disp_config_upd][DDP](250)O_R1_DBG =0x10000001
[ 51.779676]<1>.(1)[85:disp_config_upd][DDP](254)O_R2_DBG =0x10000001
[ 51.780490]<1>.(1)[85:disp_config_upd][DDP](258)O_R3_DBG =0x13d3d3d1
[ 51.781320]<1>.(1)[85:disp_config_upd][DDP]TOTAL dump 66 registers
你的RAM是多大的?
有没有跑一下ETT，看看是否有问题?