mt82出现lcm的bug
[PLFM] Keep stay in USB Mode
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_cpu_freq = 1040000Khz
wait for frequency meter finish, CLK26CALI = 0x90
mt_pll_post_init: mt_get_bus_freq = 273000Khz
wait for frequency meter finish, CLK26CALI = 0x81
mt_pll_post_init: mt_get_mem_freq = 265052Khz
[PWRAP] pwrap_init_preloader
[PWRAP] pwrap_init
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=0,rdata=800
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=1 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=2 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=3 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=4 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=5 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=6 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] pass,index=7 rdata=5AA5
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=8,rdata=1001
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=9,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=10,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=11,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=12,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=13,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=14,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=15,rdata=B54B
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=16,rdata=2003
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=17,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=18,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=19,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=20,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=21,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=22,rdata=6A97
[PWRAP] _pwrap_init_sistrobe [Read Test] fail,index=23,rdata=6A97
[PWRAP] _pwrap_init_reg_clock
[PMIC_WRAP]wrap_init pass,the return value=0.
[PMIC6323_init] Preloader Start..................
[pmic6323_init] PMIC CHIP Code = 0X2023
INT_MISC_CON: 1 TOP_RST_MISC: 0
pl pmic powerkey Release
[pmic6323_init] powerKey = 0
[pmic6323_init] is USB in = 0xB004
[pmic6323_init] Reg[0x11A]=0x1B
[pmic6323_init] Done...................
chr force en
[PLFM] Init I2C: OK(0)
[PLFM] Init PWRAP: OK(0)
[PLFM] Init PMIC: OK(0)
[PLFM] chip[CA00]
[BLDR] Build Time: 20151024-193825
1.653657].(0)[1:swapper/0]-AudDrv_btcvsd_probe
[ 1.653687].(0)[1:swapper/0]AudioMTKBTCVSD AudDrv_device2
[ 1.653695].(0)[1:swapper/0]！mtk_device_btif register ret 0register MTK_SMI device
[ 1.655428]-(0)[1:swapper/0][SMI] [pid=1]on_larb_power_off(), larb_idx=1
[ 1.655536]-(0)[1:swapper/0][SMI] [pid=1]on_larb_power_off(), larb_idx=2
[ 1.656462].(0)[1:swapper/0][DDP]
[ 1.656469].(0)[1:swapper/0]disp driver probe...
[ 1.656476].(0)[1:swapper/0]
[ 1.656502].(0)[1:swapper/0][DDP]Get DISP Device Major number (252706816)
[ 1.657379]-(0)[1:swapper/0][DDP]error:IRQ: OVL frame underrun！ cnt=0
[ 1.657396]-(0)[1:swapper/0][DDP]0xf0000000=0x0, 0xf0000050=0x818100, 0xf0000040=0x1010101
[ 1.657427]-(0)[1:swapper/0][DDP]ovl0: en=1, layer(0,0,1,1), bg_w=720, bg_h=1280, cur_x=13, cur_y=134, layer_pix_hit(0, 0, 1, 1)
[ 1.657441]-(0)[1:swapper/0][DDP]ovl_status: rdma1_idle,rdma0_idle,ovl_running,
[ 1.657459]-(0)[1:swapper/0][DDP]ovl_state_machine: processing
[ 1.657476]-(0)[1:swapper/0][DDP]ovl0: greq(ovl_req_smi)=0, valid(ovl_send_data)=1, ready(follow_engine_req_data)=0
[ 1.657499]-(0)[1:swapper/0][DDP]layer=2, w=720, h=1280, x=0, y=0, pitch=1440, addr=0xbeb00000, fmt=rgb565
[ 1.657521]-(0)[1:swapper/0][DDP]layer=3, w=720, h=1280, x=0, y=0, pitch=1440, addr=0xbecc2000, fmt=rgb565
[ 1.657546]-(0)[1:swapper/0][DDP]rdma0: en=1, mode=direct_link, smi_busy=0, w=720, h=1280, pitch=1440, addr=0x0, fmt=rgb888, fifo_min=13
[ 1.657566]-(0)[1:swapper/0][DDP]rdma0: ack=0, req=0, status=unknown, output_x=0, output_y=0
[ 1.657583]-(0)[1:swapper/0][DDP]color: w=720, h=1280, h_cnt=622, line_cnt=145
[ 1.657593]-(0)[1:swapper/0][DDP]BLS:
[ 1.657601]-(0)[1:swapper/0][DDP]clock:smi common, smi larb0, disp_color, disp_bls, disp_wdma0, disp_rdma, disp_ovl, mutex_32k, disp_rdma1,
[ 1.657638]-(0)[1:swapper/0]dsi_engine, dsi_digital, dpi_digital_lane, dpi_engine,
[ 1.657658]-(0)[1:swapper/0][DDP]clock 6496
[ 1.657666]-(0)[1:swapper/0][DDP]mutex:
[ 1.657677]-(0)[1:swapper/0][DDP]mutex0, mode=dsi_vdo, module=(ovl,color,rdma0,)
[ 1.657706]-(0)[1:swapper/0][DDP]dsi: w=720, h=1280, busy=1, rdma_line_counter=0, staus=Idle (wait for command), [DDP]error_state=lpdt_sync_err,
[ 1.657754]-(0)[1:swapper/0][DDP]error:IRQ: OVL-L2 not complete untill EOF！
[ 1.657770]-(0)[1:swapper/0][DDP]0xf0000000=0x0, 0xf0000050=0x818100, 0xf0000040=0x1010101
[ 1.657785]-(0)[1:swapper/0][DDP]error:IRQ: OVL-L3 not complete untill EOF！
[ 1.657800]-(0)[1:swapper/0][DDP]0xf0000000=0x0, 0xf0000050=0x818100, 0xf0000040=0x1010101
[ 1.657877]-(0)[1:swapper/0]BUG: spinlock bad magic on CPU#0, swapper/0/1
[ 1.657895]-(0)[1:swapper/0] lock: c166fb7c, .magic: 00000000, .owner: <none>/-1, .owner_cpu: 0, value: 0
[ 1.657908]-(0)[1:swapper/0]Backtrace:
[ 1.657948]-(0)[1:swapper/0][<c001284c>] (dump_backtrace+0x0/0x114) from [<c07f3380>] (dump_stack+0x20/0x24)
[ 1.657963]-(0)[1:swapper/0] r6:c0b8e048 r5:c166fb7c r4:00000000 r3:271ae95f
[ 1.658004]-(0)[1:swapper/0][<c07f3360>] (dump_stack+0x0/0x24) from [<c07f9438>] (spin_dump+0x84/0x98)
[ 1.658030]-(0)[1:swapper/0][<c07f93b4>] (spin_dump+0x0/0x98) from [<c07f9470>] (spin_bug+0x24/0x98)
[ 1.658044]-(0)[1:swapper/0] r5:c0a01660 r4:c0b8e048
[ 1.658077]-(0)[1:swapper/0][<c07f944c>] (spin_bug+0x0/0x98) from [<c02e5674>] (do_raw_spin_lock+0x160/0x228)
[ 1.658091]-(0)[1:swapper/0] r5:20000193 r4:c166fb7c
[ 1.658125]-(0)[1:swapper/0][<c02e5514>] (do_raw_spin_lock+0x0/0x228) from [<c0806548>] (_raw_spin_lock_irqsave+0x74/0x88)
[ 1.658158]-(0)[1:swapper/0][<c08064d4>] (_raw_spin_lock_irqsave+0x0/0x88) from [<c0080d7c>] (__wake_up+0x2c/0x5c)
[ 1.658172]-(0)[1:swapper/0] r6:00000001 r5:c16719d8 r4:c166fb7c
[ 1.658210]-(0)[1:swapper/0][<c0080d50>] (__wake_up+0x0/0x5c) from [<c0617fb4>] (disp_irq_handler+0x140/0xa90)
[ 1.658224]-(0)[1:swapper/0] r8:00000000 r7:c16706e8 r6:00000195 r5:c16719d8 r4:c16706e8
[ 1.658270]-(0)[1:swapper/0][<c0617e74>] (disp_irq_handler+0x0/0xa90) from [<c00fe660>] (handle_irq_event_percpu+0x88/0x4dc)
[ 1.658300]-(0)[1:swapper/0][<c00fe5d8>] (handle_irq_event_percpu+0x0/0x4dc) from [<c00feb00>] (handle_irq_event+0x4c/0x6c)
[ 1.658330]-(0)[1:swapper/0][<c00feab4>] (handle_irq_event+0x0/0x6c) from [<c01015cc>] (handle_level_irq+0xbc/0x10c)
[ 1.658345]-(0)[1:swapper/0] r6:c0b8f0a8 r5:c0b85b50 r4:c0b85b00 r3:00022008
[ 1.658387]-(0)[1:swapper/0][<c0101510>] (handle_level_irq+0x0/0x10c) from [<c00fdd78>] (generic_handle_irq+0x4c/0xbc)
[ 1.658402]-(0)[1:swapper/0] r5:000000b9 r4:000000b9
[ 1.658433]-(0)[1:swapper/0][<c00fdd2c>] (generic_handle_irq+0x0/0xbc) from [<c000ee48>] (handle_IRQ+0x60/0x130)
[ 1.658448]-(0)[1:swapper/0] r6:c0b8f0a8 r5:df84c000 r4:000000b9 r3:000000dc
[ 1.658487]-(0)[1:swapper/0][<c000ede8>] (handle_IRQ+0x0/0x130) from [<c00085a0>] (asm_do_IRQ+0x18/0x1c)
[ 1.658513]-(0)[1:swapper/0][<c0008588>] (asm_do_IRQ+0x0/0x1c) from [<c08071fc>] (__irq_svc+0x3c/0xd8)
[ 1.658528]-(0)[1:swapper/0]Exception stack(0xdf84dcc8 to 0xdf84dd10)
[ 1.658546]-(0)[1:swapper/0]dcc0: 00000001 00010722 00000000 df826000 60000013 c0b85b50
[ 1.658566]-(0)[1:swapper/0]dce0: c0b85b50 00000000 000000b9 c0b85b30 60000013 df84dd24 df84dce0 df84dd10
[ 1.658583]-(0)[1:swapper/0]dd00: c00cfef8 c0806db0 20000013 ffffffff
[ 1.658608]-(0)[1:swapper/0][<c0806d38>] (_raw_spin_unlock_irqrestore+0x0/0x7c) from [<c00ffeec>] (__setup_irq+0x17c/0x3b8)
[ 1.658624]-(0)[1:swapper/0] r5:df315c80 r4:c0b85b00
[ 1.658655]-(0)[1:swapper/0][<c00ffd70>] (__setup_irq+0x0/0x3b8) from [<c01001e8>] (request_threaded_irq+0xc0/0x14c)
[ 1.658683]-(0)[1:swapper/0][<c0100128>] (request_threaded_irq+0x0/0x14c) from [<c06151f0>] (disp_probe+0x138/0x360)
[ 1.658714]-(0)[1:swapper/0][<c06150b8>] (disp_probe+0x0/0x360) from [<c031f62c>] (platform_drv_probe+0x28/0x2c)
[ 1.658743]-(0)[1:swapper/0][<c031f604>] (platform_drv_probe+0x0/0x2c) from [<c031e068>] (driver_probe_device+0x7c/0x1fc)
[ 1.658771]-(0)[1:swapper/0][<c031dfec>] (driver_probe_device+0x0/0x1fc) from [<c031e2e0>] (__device_attach+0x50/0x54)
[ 1.658786]-(0)[1:swapper/0] r8:00000000 r7:c0b8e048 r6:c031e290 r5:c0b9a120 r4:c0c0d2ec
[ 1.658815]-(0)[1:swapper/0]r3:c031ff48
[ 1.658840]-(0)[1:swapper/0][<c031e290>] (__device_attach+0x0/0x54) from [<c031c418>] (bus_for_each_drv+0x54/0x9c)
[ 1.658854]-(0)[1:swapper/0] r5:c0b9a120 r4:00000000
[ 1.658883]-(0)[1:swapper/0][<c031c3c4>] (bus_for_each_drv+0x0/0x9c) from [<c031dfac>] (device_attach+0x88/0x94)
[ 1.658898]-(0)[1:swapper/0] r6:c0bbf9b8 r5:c0b9a154 r4:c0b9a120
[ 1.658932]-(0)[1:swapper/0][<c031df24>] (device_attach+0x0/0x94) from [<c031d4ec>] (bus_probe_device+0x98/0xbc)
[ 1.658947]-(0)[1:swapper/0] r6:c0bbf9b8 r5:c0b9a120 r4:00000000 r3:df8d3840
[ 1.658985]-(0)[1:swapper/0][<c031d454>] (bus_probe_device+0x0/0xbc) from [<c031ba3c>] (device_add+0x504/0x5dc)
[ 1.658999]-(0)[1:swapper/0] r6:c0bbf9f8 r5:c0b9a128 r4:00000000 r3:00000000
[ 1.659038]-(0)[1:swapper/0][<c031b538>] (device_add+0x0/0x5dc) from [<c031fd7c>] (platform_device_add+0xf4/0x1ac)
[ 1.659068]-(0)[1:swapper/0][<c031fc88>] (platform_device_add+0x0/0x1ac) from [<c0320018>] (platform_device_register+0x30/0x34)
[ 1.659083]-(0)[1:swapper/0] r7:c0b99278 r6:000001a0 r5:00000000 r4:c0b9a118
[ 1.659128]-(0)[1:swapper/0][<c031ffe8>] (platform_device_register+0x0/0x34) from [<c0b1dcf4>] (mt_board_init+0x19c/0x85c)
[ 1.659143]-(0)[1:swapper/0] r4:00000003 r3:271ae95f
[ 1.659174]-(0)[1:swapper/0][<c0b1db58>] (mt_board_init+0x0/0x85c) from [<c0b1e618>] (board_init+0x10/0x18)
[ 1.659201]-(0)[1:swapper/0][<c0b1e608>] (board_init+0x0/0x18) from [<c0008784>] (do_one_initcall+0x130/0x1b8)
[ 1.659227]-(0)[1:swapper/0][<c0008654>] (do_one_initcall+0x0/0x1b8) from [<c0b17a0c>] (kernel_init+0x104/0x1cc)
[ 1.659255]-(0)[1:swapper/0][<c0b17908>] (kernel_init+0x0/0x1cc) from [<c0057d00>] (do_exit+0x0/0x7dc)
[ 1.659619]-(0)[1:swapper/0][aee/aek] kernel_reportAPI,Spinlock swapper/0 :bad magic
[ 1.659629]-(0)[1:swapper/0],</home/sda6/h32_6582_kk/ALPS.KK1.MP1.V2.10_MT6582_WET_KK/alps/kernel/lib/spinlock_debug.c:80> spinlock debugger
[ 1.659640]-(0)[1:swapper/0]
[ 1.659645]-(0)[1:swapper/0]Backtrace:
[ 1.659651]-(0)[1:swapper/0][<c001231c>] save_stack_trace_tsk+0x0/0xa0
[ 1.659659]-(0)[1:swapper/0][<c0431d70>] aee_get_traces+0x68/0xc4
[ 1.659666]-(0)[1:swapper/0][<c0431e64>] aee_kernel_warning_api+0x98/0xe4
[ 1.659674]-(0)[1:swapper/0][<c07f94b8>] spin_bug+0x6c/0x98
[ 1.659681]-(0)[1:swapper/0][<c02e5674>] do_raw_spin_lock+0x160/0x228
[ 1.659688]-(0)[1:swapper/0][<c0806548>] _raw_spin_lock_irqsave+0x74/0x88
[ 1.659696]-(0)[1:swapper/0][<c0080d7c>] __wake_up+0x2c/0x5c
[ 1.659703]-(0)[1:swapper/0][<c0617fb4>] disp_irq_handler+0x140/0xa90
[ 1.659710]-(0)[1:swapper/0][<c00fe660>] handle_irq_event_percpu+0x88/0x4dc
[ 1.659718]-(0)[1:swapper/0][<c00feb00>] handle_irq_event+0x4c/0x6c
[ 1.659725]-(0)[1:swapper/0][<c01015cc>] handle_level_irq+0xbc/0x10c
[ 1.659733]-(0)[1:swapper/0][<c00fdd78>] generic_handle_irq+0x4c/0xbc
只来个log，具体是什么情况啊，这个lcm以前没有调过的?
具体什么问题?
82是量产代码 已经好几个项目
调试另外otm1287a 这个lcm屏，出现重启现象
[ 1.656469].(0)[1:swapper/0]disp driver probe...
[ 1.656476].(0)[1:swapper/0]
[ 1.656502].(0)[1:swapper/0][DDP]Get DISP Device Major number (252706816)
82是量产代码 已经好几个项目，lcm以前没有调试过
调试另外otm1287a 这个lcm屏，出现重启现象
[ 1.656469].(0)[1:swapper/0]disp driver probe...
[ 1.656476].(0)[1:swapper/0]
[ 1.656502].(0)[1:swapper/0][DDP]Get DISP Device Major number (252706816)
应该说otm1287a 这个lcm屏之前没有调试过
跟 这个贴的问题是一样的 http://www.16rd.com/thread-19999-1-1.html
可能是CLK没有调好。这个没有设置好，会引起系统重启的。
你的是横屏?
频率有个公式算的，照公式算的来，适当调小一些。
竖屏
#ifndef BUILD_LK
#include <linux/string.h>
#endif
#include "lcm_drv.h"
#ifdef BUILD_LK
#include <platform/mt_gpio.h>
#include <platform/mt_pmic.h>
#elif defined(BUILD_UBOOT)
#else
#include <mach/mt_gpio.h>
#include <mach/mt_pm_ldo.h>
#include <mach/upmu_common.h>
#endif
// ---------------------------------------------------------------------------
// Local Constants
// ---------------------------------------------------------------------------
#define FRAME_WIDTH (720)
#define FRAME_HEIGHT (1280)
#define REGFLAG_DELAY 0XFE
#define REGFLAG_END_OF_TABLE 0xFF // END OF REGISTERS MARKER
// ---------------------------------------------------------------------------
// Local Variables
// ---------------------------------------------------------------------------
static LCM_UTIL_FUNCS lcm_util = {0};
#define SET_RESET_PIN(v) (lcm_util.set_reset_pin((v)))
#define UDELAY(n) (lcm_util.udelay(n))
#define MDELAY(n) (lcm_util.mdelay(n))
// ---------------------------------------------------------------------------
// Local Functions
// ---------------------------------------------------------------------------
#define dsi_set_cmdq_V2(cmd, count, ppara, force_update) lcm_util.dsi_set_cmdq_V2(cmd, count, ppara, force_update)
#define dsi_set_cmdq(pdata, queue_size, force_update) lcm_util.dsi_set_cmdq(pdata, queue_size, force_update)
#define wrtie_cmd(cmd) lcm_util.dsi_write_cmd(cmd)
#define write_regs(addr, pdata, byte_nums) lcm_util.dsi_write_regs(addr, pdata, byte_nums)
#define read_reg(cmd) lcm_util.dsi_dcs_read_lcm_reg(cmd)
#define read_reg_v2(cmd, buffer, buffer_size) lcm_util.dsi_dcs_read_lcm_reg_v2(cmd, buffer, buffer_size)
#define LCM_DSI_CMD_MODE 0
// ---------------------------------------------------------------------------
// LCM Driver Implementations
// ---------------------------------------------------------------------------
struct LCM_setting_table {
unsigned char cmd;
unsigned char count;
unsigned char para_list[64];
};
static void push_table(struct LCM_setting_table *table, unsigned int count, unsigned char force_update)
{
unsigned int i;
for(i = 0; i < count; i++) {
unsigned cmd;
cmd = table.cmd;
switch (cmd) {
case REGFLAG_DELAY :
MDELAY(table.count);
break;
case REGFLAG_END_OF_TABLE :
break;
default:
dsi_set_cmdq_V2(cmd, table.count, table.para_list, force_update);
}
}
}
static void lcm_set_util_funcs(const LCM_UTIL_FUNCS *util)
{
memcpy(&lcm_util, util, sizeof(LCM_UTIL_FUNCS));
}
static void lcm_get_params(LCM_PARAMS *params)
{
memset(params, 0, sizeof(LCM_PARAMS));
params->type = LCM_TYPE_DSI;
params->width = FRAME_WIDTH;
params->height = FRAME_HEIGHT;
params->dsi.mode = SYNC_PULSE_VDO_MODE;//BURST_VDO_MODE;//SYNC_EVENT_VDO_MODE;
// DSI
/* Command mode setting */
//1 Three lane or Four lane
params->dsi.LANE_NUM = LCM_FOUR_LANE;
//The following defined the fomat for data coming from LCD engine.
params->dsi.data_format.color_order = LCM_COLOR_ORDER_RGB;
params->dsi.data_format.trans_seq = LCM_DSI_TRANS_SEQ_MSB_FIRST;
params->dsi.data_format.padding = LCM_DSI_PADDING_ON_LSB;
params->dsi.data_format.format = LCM_DSI_FORMAT_RGB888;
// Highly depends on LCD driver capability.
// Not support in MT6573
params->dsi.packet_size=256;
// Video mode setting
params->dsi.intermediat_buffer_num = 2;//because DSI/DPI HW design change, this parameters should be 0 when video mode in MT658X; or memory leakage
params->dsi.PS=LCM_PACKED_PS_24BIT_RGB888;
params->dsi.word_count=FRAME_WIDTH*3;
params->dsi.vertical_sync_active = 2;
params->dsi.vertical_backporch = 14;
params->dsi.vertical_frontporch = 16;
params->dsi.vertical_active_line = FRAME_HEIGHT;
params->dsi.horizontal_sync_active = 0x0B;
params->dsi.horizontal_backporch = 42;
params->dsi.horizontal_frontporch = 44;
params->dsi.horizontal_active_pixel = FRAME_WIDTH;
// Bit rate calculation
//1 Every lane speed
// Bit rate calculation
// params->dsi.pll_div1 = 1;
// params->dsi.pll_div2 = 1;
// params->dsi.fbk_div = 25;
params->dsi.PLL_CLOCK = 200;
}
static void lcm_init_register(void)
{
unsigned int data_array[16];
}
static struct LCM_setting_table lcm_initialization_setting[] = {
{0x00, 1, {0x00}},
{0xff, 3, {0x12,0x87,0x01}}, //EXTC=1
{0x00, 1, {0x80}}, //Orise mode enable
{0xff, 2, {0x12,0x87}},
//-------------------- panel setting --------------------//
{0x00, 1, {0x80}}, //TCON Setting
{0xc0, 9, {0x00,0x64,0x00,0x0f,0x11,0x00,0x64,0x0f,0x11}},
{0x00, 1, {0x90}}, //Panel Timing Setting
{0xc0, 6, {0x00,0x5c,0x00,0x01,0x00,0x04}},
{0x00, 1, {0xa4}}, //source pre.
{0xc0, 1, {0x00}},
{0x00, 1, {0xb3}}, //Interval Scan Frame: 0 frame, column inversion
{0xc0, 2, {0x00,0x55}},
{0x00, 1, {0x81}}, //frame rate:60Hz
{0xc1, 1, {0x55}},
//------------for CPT 050WA01 / GP 053WA1 / BOE Power IC------------
{0x00, 1, {0x90}}, //Mode-3
{0xf5, 4, {0x02,0x11,0x02,0x15}},
{0x00, 1, {0x90}}, //2xVPNL, 1.5*=00, 2*=50, 3*=a0
{0xc5, 1, {0x50}},
{0x00, 1, {0x94}}, //Frequency
{0xc5, 1, {0x66}},
//------------------VGLO1/O2 disable----------------
{0x00, 1, {0xb2}}, //VGLO1
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0xb6}}, //VGLO2
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0x94}}, //VCL pump dis
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0xd2}}, //VCL reg. en
{0xf5, 2, {0x06,0x15}},
{0x00, 1, {0xb4}}, //VGLO1/2 Pull low setting
{0xc5, 1, {0xcc}}, //d[7] vglo1 d[6] vglo2 => 0: pull vss, 1: pull vgl
//-------------------- power setting --------------------//
{0x00, 1, {0xa0}}, //dcdc setting
{0xc4, 14, {0x05,0x10,0x06,0x02,0x05,0x15,0x10,0x05,0x10,0x07,0x02,0x05,0x15,0x10}},
{0x00, 1, {0xb0}}, //clamp voltage setting
{0xc4, 2, {0x00,0x00}},
{0x00, 1, {0x91}}, //VGH=12V, VGL=-12V, pump ratio:VGH=6x, VGL=-5x
{0xc5, 2, {0x19,0x52}},
{0x00, 1, {0x00}}, //GVDD=4.87V, NGVDD=-4.87V
{0xd8, 2, {0xbc,0xbc}},
{0x00, 1, {0xb3}}, //VDD_18V=1.7V, LVDSVDD=1.6V
{0xc5, 1, {0x84}},
{0x00, 1, {0xbb}}, //LVD voltage level setting
{0xc5, 1, {0x8a}},
{0x00, 1, {0x82}}, //flash-orise add
{0xc4, 1, {0x0a}},
{0x00, 1, {0xc6}}, //debounce
{0xB0, 1, {0x03}},
//-------------------- GAMMA TUNING ------------------------------------------//
{0x00, 1, {0x00}},
{0xE1, 20, {0x1F,0x3E,0x59,0x67,0x74,0x7F,0x7C,0xA4,0x91,0xA8,0x5B,0x46,0x5B,0x3C,0x40,0x37,0x2C,0x22,0x0E,0x00}},
{0x00, 1, {0x00}},
{0xE1, 20, {0x1F,0x3E,0x59,0x65,0x71,0x7D,0x78,0x9F,0x8F,0xA8,0x5A,0x46,0x59,0x3B,0x3F,0x36,0x2C,0x22,0x0E,0x00}},
{0x00, 1, {0x00}}, //VCOMDC=-1.1
{0xd9, 1, {0x55}},
//-------------------- panel timing state control --------------------//
{0x00, 1, {0x80}}, //panel timing state control
{0xcb, 11, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0x90}}, //panel timing state control
{0xcb, 15, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xa0}}, //panel timing state control
{0xcb, 15, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xb0}}, //panel timing state control
{0xcb, 15, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xc0}}, //panel timing state control
{0xcb, 15, {0x05,0x05,0x05,0x05,0x05,0x05,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xd0}}, //panel timing state control
{0xcb, 15, {0x00,0x00,0x00,0x00,0x00,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x05,0x00,0x00}},
{0x00, 1, {0xe0}}, //panel timing state control
{0xcb, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x05,0x05}},
{0x00, 1, {0xf0}}, //panel timing state control
{0xcb, 11, {0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff}},
//-------------------- panel pad mapping control --------------------//
{0x00, 1, {0x80}}, //panel pad mapping control
{0xcc, 15, {0x0a,0x0c,0x0e,0x10,0x02,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0x90}}, //panel pad mapping control
{0xcc, 15, {0x00,0x00,0x00,0x00,0x00,0x2e,0x2d,0x09,0x0b,0x0d,0x0f,0x01,0x03,0x00,0x00}},
{0x00, 1, {0xa0}}, //panel pad mapping control
{0xcc, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x2e,0x2d}},
{0x00, 1, {0xb0}}, //panel pad mapping control
{0xcc, 15, {0x0F,0x0D,0x0B,0x09,0x03,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xc0}}, //panel pad mapping control
{0xcc, 15, {0x00,0x00,0x00,0x00,0x00,0x2d,0x2e,0x10,0x0E,0x0C,0x0A,0x04,0x02,0x00,0x00}},
{0x00, 1, {0xd0}}, //panel pad mapping control
{0xcc, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x2d,0x2e}},
//-------------------- panel timing setting --------------------//
{0x00, 1, {0x80}}, //panel VST setting
{0xce, 12, {0x8f,0x03,0x00,0x8e,0x03,0x00,0x8d,0x03,0x00,0x8c,0x03,0x00}},
{0x00, 1, {0x90}}, //panel VEND setting
{0xce, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xa0}}, //panel CLKA1/2 setting
{0xce, 14, {0x38,0x0b,0x05,0x00,0x00,0x0a,0x0a,0x38,0x0a,0x05,0x01,0x00,0x0a,0x0a}},
{0x00, 1, {0xb0}}, //panel CLKA3/4 setting
{0xce, 14, {0x38,0x09,0x05,0x02,0x00,0x0a,0x0a,0x38,0x08,0x05,0x03,0x00,0x0a,0x0a}},
{0x00, 1, {0xc0}}, //panel CLKb1/2 setting
{0xce, 14, {0x38,0x07,0x05,0x04,0x00,0x0a,0x0a,0x38,0x06,0x05,0x05,0x00,0x0a,0x0a}},
{0x00, 1, {0xd0}}, //panel CLKb3/4 setting
{0xce, 14, {0x38,0x05,0x05,0x06,0x00,0x0a,0x0a,0x38,0x04,0x05,0x07,0x00,0x0a,0x0a}},
{0x00, 1, {0x80}}, //panel CLKc1/2 setting
{0xcf, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0x90}}, //panel CLKc3/4 setting
{0xcf, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xa0}}, //panel CLKd1/2 setting
{0xcf, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xb0}}, //panel CLKd3/4 setting
{0xcf, 14, {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00}},
{0x00, 1, {0xc0}}, //panel ECLK setting
{0xcf, 11, {0x01,0x01,0x20,0x20,0x00,0x00,0x01,0x02,0x00,0x00,0x08}},
{0x00, 1, {0xb5}}, //TCON_GOA_OUT Setting
{0xc5, 6, {0x33,0xf1,0xff,0x33,0xf1,0xff}}, //normal output with VGH/VGL
{0x00, 1, {0xc6}}, //debounce
{0xB0, 1, {0x03}},
{0x00, 1, {0xb2}}, //VGLO1
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0xb6}}, //VGLO2
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0x94}}, //VCL pump dis
{0xf5, 2, {0x00,0x00}},
{0x00, 1, {0xd2}}, //VCL reg. en
{0xf5, 2, {0x06,0x15}},
{0x00, 1, {0x00}}, //Orise mode disable
{0xff, 3, {0xff,0xff,0xff}},
{0x11,0,{0x00}},//SLEEP OUT
{REGFLAG_DELAY,120,{}},
{0x29,0,{0x00}},//Display ON
{REGFLAG_DELAY,50,{}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_sleep_in_setting[] = {
// Display off sequence
{0x28, 1, {0x00}},
{REGFLAG_DELAY, 150, {}},
// Sleep Mode On
{0x10, 1, {0x00}},
{REGFLAG_DELAY, 100, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static struct LCM_setting_table lcm_sleep_out_setting[] = {
// Sleep Out
{0x11, 1, {0x00}},
{REGFLAG_DELAY, 150, {}},
// Display ON
{0x29, 1, {0x00}},
{REGFLAG_DELAY, 150, {}},
{REGFLAG_END_OF_TABLE, 0x00, {}}
};
static void lcd_reset(unsigned char enabled)
{
if (enabled)
{
mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ONE);
}
else
{
mt_set_gpio_out(GPIO_LCM_RST, GPIO_OUT_ZERO);
}
}
static void lcm_init(void)
{
lcd_reset(1);
MDELAY(10);
lcd_reset(0);
MDELAY(100);
lcd_reset(1);
MDELAY(100);
//lcm_init_register();
push_table(lcm_initialization_setting, sizeof(lcm_initialization_setting) / sizeof(struct LCM_setting_table), 1);
}
static void lcm_suspend(void)
{
push_table(lcm_sleep_in_setting, sizeof(lcm_sleep_in_setting) / sizeof(struct LCM_setting_table), 1);
}
static void lcm_resume(void)
{
lcm_init();
}
static unsigned int lcm_compare_id(void)
{
return 1;
}
// ---------------------------------------------------------------------------
// Get LCM Driver Hooks
// ---------------------------------------------------------------------------
LCM_DRIVER otm1287a_hd720_dsi_vdo_truly_lcm_drv =
{
.name = "otm1283",
.set_util_funcs = lcm_set_util_funcs,
.get_params = lcm_get_params,
.init = lcm_init,
.suspend = lcm_suspend,
.resume = lcm_resume,
.compare_id = lcm_compare_id,
};
改一下这个： params->dsi.PLL_CLOCK = 200;
看看。
这个问题是patch的问题82M补丁HD
# for MT6582M HD
MTK_CUSTOM_LCM_PATCH=yes
# for MT6582M HD
很喜欢，很开心
很喜欢，很开心00000