加法器有些不明白,请大牛赐教
时间:10-02
整理:3721RD
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if a(i-1)='1' xor b(i-1)='1' xor c1='1' then s1(i-1):='1';else s1(i-1):='0';
这句话是什么意思呢 a(i-)=‘1’,又是什么意思啊 是加法器里面完整程序在下面。多谢大牛们解答
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity dajiafaqi is
generic( s:integer:=8);
port(a,b:in std_logic_vector(s-1 downto 0);
cin:in std_logic;
sum: out std_logic_vector(s-1 downto 0);
cout:out std_logic);
end entity dajiafaqi;
architecture bhv of dajiafaqi is
begin
process(a,b,cin)
variable s1:std_logic_vector(s-1 downto 0);
variable c1:std_logic;--_vector(s downto 0);
begin
c1:=cin;
--c1(0):=cin;
for i in 1 to s loop
if a(i-1)='1' xor b(i-1)='1' xor c1='1' then s1(i-1):='1';else s1(i-1):='0';
end if;
if(a(i-1)='1' and b(i-1)='1')or (a(i-1)='1' and c1='1') or (b(i-1)='1' and c1='1') or (a(i-1)='1' and b(i-1)='1' and c1='1')
then c1:='1';
else c1:='0';
end if;
end loop;
sum<=s1;cout<=c1;
end process;
end architecture bhv;
这句话是什么意思呢 a(i-)=‘1’,又是什么意思啊 是加法器里面完整程序在下面。多谢大牛们解答
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity dajiafaqi is
generic( s:integer:=8);
port(a,b:in std_logic_vector(s-1 downto 0);
cin:in std_logic;
sum: out std_logic_vector(s-1 downto 0);
cout:out std_logic);
end entity dajiafaqi;
architecture bhv of dajiafaqi is
begin
process(a,b,cin)
variable s1:std_logic_vector(s-1 downto 0);
variable c1:std_logic;--_vector(s downto 0);
begin
c1:=cin;
--c1(0):=cin;
for i in 1 to s loop
if a(i-1)='1' xor b(i-1)='1' xor c1='1' then s1(i-1):='1';else s1(i-1):='0';
end if;
if(a(i-1)='1' and b(i-1)='1')or (a(i-1)='1' and c1='1') or (b(i-1)='1' and c1='1') or (a(i-1)='1' and b(i-1)='1' and c1='1')
then c1:='1';
else c1:='0';
end if;
end loop;
sum<=s1;cout<=c1;
end process;
end architecture bhv;
就是判断a的某一位是不是1啊
两个数a,b对应位和进位信号异或是在计算偶校验,如果值为1则说明三个加数中有奇数个1,则和为1,否则有偶数个1,和为0