DSP2812菜鸟非典灵光再现,想歇菜都难~~~
时间:10-02
整理:3721RD
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Study-2812增强版的改动说明
雁塔菜农HotPower@126.com 2008.5.8 于雁塔菜地
1.CPLD的改动
对光盘内的Code-F2812Ex21_HDL2DEV2812.V进行了大改动
a.加入8个键盘测试
b.改进LCD的访问不好的习惯
c.改进74hc595的锁存信号为一次完成脉冲的发送且带密码访问
d.增加CPLD的版本号或密码的访问及动态改写
e.整理了已完成例程的Verilog语言规范,但实在不愿改写管脚不良的定义
2.改写或增加CMD文件
对F2812_EzDSP_RAM_lnk.cmd内的
PRAMH0 : origin = 0x3F8002, length = 0x000FFE
改写为:
PRAMH0 : origin = 0x3F8002, length = 0x001FFE
3.增加F2812_UserVariableDefs.cmd文件
4.增加F2812_UserVariableDefs.cpp文件
5.完整可用于实战的例程
由于开始建立工程时第1个例程是LCD,所以就起名LCD_DEMO
目前抽空完成的例程主要有:
LCD,SPI,TIMER,INT,KEY,LED,SCI,ADC等
6.非典再现
改写DSP281x_Adc.h,得到2种访问方式,不破坏原TI之习惯
struct ADC_REGS {
union ADCTRL1_REG ADCTRL1; // ADC Control 1
union ADCTRL2_REG ADCTRL2; // ADC Control 2
union ADCMAXCONV_REG ADCMAXCONV; // Max conversions
union ADCCHSELSEQ1_REG ADCCHSELSEQ1; // Channel select sequencing control 1
union ADCCHSELSEQ2_REG ADCCHSELSEQ2; // Channel select sequencing control 2
union ADCCHSELSEQ3_REG ADCCHSELSEQ3; // Channel select sequencing control 3
union ADCCHSELSEQ4_REG ADCCHSELSEQ4; // Channel select sequencing control 4
union ADCASEQSR_REG ADCASEQSR; // Autosequence status register
Uint16 ADCRESULT[16];
/*
Uint16 ADCRESULT0; // Conversion Result Buffer 0
Uint16 ADCRESULT1; // Conversion Result Buffer 1
Uint16 ADCRESULT2; // Conversion Result Buffer 2
Uint16 ADCRESULT3; // Conversion Result Buffer 3
Uint16 ADCRESULT4; // Conversion Result Buffer 4
Uint16 ADCRESULT5; // Conversion Result Buffer 5
Uint16 ADCRESULT6; // Conversion Result Buffer 6
Uint16 ADCRESULT7; // Conversion Result Buffer 7
Uint16 ADCRESULT8; // Conversion Result Buffer 8
Uint16 ADCRESULT9; // Conversion Result Buffer 9
Uint16 ADCRESULT10; // Conversion Result Buffer 10
Uint16 ADCRESULT11; // Conversion Result Buffer 11
Uint16 ADCRESULT12; // Conversion Result Buffer 12
Uint16 ADCRESULT13; // Conversion Result Buffer 13
Uint16 ADCRESULT14; // Conversion Result Buffer 14
Uint16 ADCRESULT15; // Conversion Result Buffer 15
*/
union ADCTRL3_REG ADCTRL3; // ADC Control 3
union ADCST_REG ADCST; // ADC Status Register
};
#define ADCRESULT0 ADCRESULT[0]
#define ADCRESULT1 ADCRESULT[1]
#define ADCRESULT2 ADCRESULT[2]
#define ADCRESULT3 ADCRESULT[3]
#define ADCRESULT4 ADCRESULT[4]
#define ADCRESULT5 ADCRESULT[5]
#define ADCRESULT6 ADCRESULT[6]
#define ADCRESULT7 ADCRESULT[7]
#define ADCRESULT8 ADCRESULT[8]
#define ADCRESULT9 ADCRESULT[9]
#define ADCRESULT10 ADCRESULT[10]
#define ADCRESULT11 ADCRESULT[11]
#define ADCRESULT12 ADCRESULT[12]
#define ADCRESULT13 ADCRESULT[13]
#define ADCRESULT14 ADCRESULT[14]
#define ADCRESULT15 ADCRESULT[15]
应用例如:
for (int i = 0; i < sizeof(Result); i ++)
{
Result = 0;
}
for (int i = 0; i < 16; i ++)
{
AdcRegs.ADCRESULT = 0;
}
AdcRegs.ADCRESULT[0] = 0;
AdcRegs.ADCRESULT0 = 0;
AdcRegs.ADCRESULT[1] = 0;
AdcRegs.ADCRESULT1 = 0;
此思路可在其他类型一致连续的结构中都可利用~~~
例如:
在DSP281x_ECan.h中
struct ECAN_MBOXES {
struct MBOX MBOX0;
//.....
struct MBOX MBOX31;
};
改为:
struct ECAN_MBOXES {
struct MBOX MBOXS[32];
};
#define MBOX0 MBOXS[0]
//..
#define MBOX31 MBOXS[31]
在DSP281x_SysCtrl.h中
/* Password locations */
struct CSM_PWL {
Uint16 PSWD0; // PSWD bits 15-0
Uint16 PSWD1; // PSWD bits 31-16
Uint16 PSWD2; // PSWD bits 47-32
Uint16 PSWD3; // PSWD bits 63-48
Uint16 PSWD4; // PSWD bits 79-64
Uint16 PSWD5; // PSWD bits 95-80
Uint16 PSWD6; // PSWD bits 111-96
Uint16 PSWD7; // PSWD bits 127-112
};
可改为:
/* Password locations */
struct CSM_PWL {
Uint16 PSWD[8]; // PSWD bits 15-0
};
#define PSWD0 PSWD[0]
//.....
#define PSWD7 PSWD[7]
/* CSM Register File */
struct CSM_REGS {
Uint16 KEY0; // KEY reg bits 15-0
Uint16 KEY1; // KEY reg bits 31-16
Uint16 KEY2; // KEY reg bits 47-32
Uint16 KEY3; // KEY reg bits 63-48
Uint16 KEY4; // KEY reg bits 79-64
Uint16 KEY5; // KEY reg bits 95-80
Uint16 KEY6; // KEY reg bits 111-96
Uint16 KEY7; // KEY reg bits 127-112
Uint16 rsvd1; // reserved
Uint16 rsvd2; // reserved
Uint16 rsvd3; // reserved
Uint16 rsvd4; // reserved
Uint16 rsvd5; // reserved
Uint16 rsvd6; // reserved
Uint16 rsvd7; // reserved
union CSMSCR_REG CSMSCR; // CSM Status & Control register
};
改为:
struct CSM_REGS {
Uint16 KEY[8];
//.....
};
#define KEY0 KEY[0]
//......
#define KEY7 KEY[7]
雁塔菜农HotPower@126.com 2008.5.8 于雁塔菜地
1.CPLD的改动
对光盘内的Code-F2812Ex21_HDL2DEV2812.V进行了大改动
a.加入8个键盘测试
b.改进LCD的访问不好的习惯
c.改进74hc595的锁存信号为一次完成脉冲的发送且带密码访问
d.增加CPLD的版本号或密码的访问及动态改写
e.整理了已完成例程的Verilog语言规范,但实在不愿改写管脚不良的定义
2.改写或增加CMD文件
对F2812_EzDSP_RAM_lnk.cmd内的
PRAMH0 : origin = 0x3F8002, length = 0x000FFE
改写为:
PRAMH0 : origin = 0x3F8002, length = 0x001FFE
3.增加F2812_UserVariableDefs.cmd文件
4.增加F2812_UserVariableDefs.cpp文件
5.完整可用于实战的例程
由于开始建立工程时第1个例程是LCD,所以就起名LCD_DEMO
目前抽空完成的例程主要有:
LCD,SPI,TIMER,INT,KEY,LED,SCI,ADC等
6.非典再现
改写DSP281x_Adc.h,得到2种访问方式,不破坏原TI之习惯
struct ADC_REGS {
union ADCTRL1_REG ADCTRL1; // ADC Control 1
union ADCTRL2_REG ADCTRL2; // ADC Control 2
union ADCMAXCONV_REG ADCMAXCONV; // Max conversions
union ADCCHSELSEQ1_REG ADCCHSELSEQ1; // Channel select sequencing control 1
union ADCCHSELSEQ2_REG ADCCHSELSEQ2; // Channel select sequencing control 2
union ADCCHSELSEQ3_REG ADCCHSELSEQ3; // Channel select sequencing control 3
union ADCCHSELSEQ4_REG ADCCHSELSEQ4; // Channel select sequencing control 4
union ADCASEQSR_REG ADCASEQSR; // Autosequence status register
Uint16 ADCRESULT[16];
/*
Uint16 ADCRESULT0; // Conversion Result Buffer 0
Uint16 ADCRESULT1; // Conversion Result Buffer 1
Uint16 ADCRESULT2; // Conversion Result Buffer 2
Uint16 ADCRESULT3; // Conversion Result Buffer 3
Uint16 ADCRESULT4; // Conversion Result Buffer 4
Uint16 ADCRESULT5; // Conversion Result Buffer 5
Uint16 ADCRESULT6; // Conversion Result Buffer 6
Uint16 ADCRESULT7; // Conversion Result Buffer 7
Uint16 ADCRESULT8; // Conversion Result Buffer 8
Uint16 ADCRESULT9; // Conversion Result Buffer 9
Uint16 ADCRESULT10; // Conversion Result Buffer 10
Uint16 ADCRESULT11; // Conversion Result Buffer 11
Uint16 ADCRESULT12; // Conversion Result Buffer 12
Uint16 ADCRESULT13; // Conversion Result Buffer 13
Uint16 ADCRESULT14; // Conversion Result Buffer 14
Uint16 ADCRESULT15; // Conversion Result Buffer 15
*/
union ADCTRL3_REG ADCTRL3; // ADC Control 3
union ADCST_REG ADCST; // ADC Status Register
};
#define ADCRESULT0 ADCRESULT[0]
#define ADCRESULT1 ADCRESULT[1]
#define ADCRESULT2 ADCRESULT[2]
#define ADCRESULT3 ADCRESULT[3]
#define ADCRESULT4 ADCRESULT[4]
#define ADCRESULT5 ADCRESULT[5]
#define ADCRESULT6 ADCRESULT[6]
#define ADCRESULT7 ADCRESULT[7]
#define ADCRESULT8 ADCRESULT[8]
#define ADCRESULT9 ADCRESULT[9]
#define ADCRESULT10 ADCRESULT[10]
#define ADCRESULT11 ADCRESULT[11]
#define ADCRESULT12 ADCRESULT[12]
#define ADCRESULT13 ADCRESULT[13]
#define ADCRESULT14 ADCRESULT[14]
#define ADCRESULT15 ADCRESULT[15]
应用例如:
for (int i = 0; i < sizeof(Result); i ++)
{
Result = 0;
}
for (int i = 0; i < 16; i ++)
{
AdcRegs.ADCRESULT = 0;
}
AdcRegs.ADCRESULT[0] = 0;
AdcRegs.ADCRESULT0 = 0;
AdcRegs.ADCRESULT[1] = 0;
AdcRegs.ADCRESULT1 = 0;
此思路可在其他类型一致连续的结构中都可利用~~~
例如:
在DSP281x_ECan.h中
struct ECAN_MBOXES {
struct MBOX MBOX0;
//.....
struct MBOX MBOX31;
};
改为:
struct ECAN_MBOXES {
struct MBOX MBOXS[32];
};
#define MBOX0 MBOXS[0]
//..
#define MBOX31 MBOXS[31]
在DSP281x_SysCtrl.h中
/* Password locations */
struct CSM_PWL {
Uint16 PSWD0; // PSWD bits 15-0
Uint16 PSWD1; // PSWD bits 31-16
Uint16 PSWD2; // PSWD bits 47-32
Uint16 PSWD3; // PSWD bits 63-48
Uint16 PSWD4; // PSWD bits 79-64
Uint16 PSWD5; // PSWD bits 95-80
Uint16 PSWD6; // PSWD bits 111-96
Uint16 PSWD7; // PSWD bits 127-112
};
可改为:
/* Password locations */
struct CSM_PWL {
Uint16 PSWD[8]; // PSWD bits 15-0
};
#define PSWD0 PSWD[0]
//.....
#define PSWD7 PSWD[7]
/* CSM Register File */
struct CSM_REGS {
Uint16 KEY0; // KEY reg bits 15-0
Uint16 KEY1; // KEY reg bits 31-16
Uint16 KEY2; // KEY reg bits 47-32
Uint16 KEY3; // KEY reg bits 63-48
Uint16 KEY4; // KEY reg bits 79-64
Uint16 KEY5; // KEY reg bits 95-80
Uint16 KEY6; // KEY reg bits 111-96
Uint16 KEY7; // KEY reg bits 127-112
Uint16 rsvd1; // reserved
Uint16 rsvd2; // reserved
Uint16 rsvd3; // reserved
Uint16 rsvd4; // reserved
Uint16 rsvd5; // reserved
Uint16 rsvd6; // reserved
Uint16 rsvd7; // reserved
union CSMSCR_REG CSMSCR; // CSM Status & Control register
};
改为:
struct CSM_REGS {
Uint16 KEY[8];
//.....
};
#define KEY0 KEY[0]
//......
#define KEY7 KEY[7]
看看吧
。