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- placecell
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- 不包括
- colck
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- Essentials
- thresholds
- remove_attribute
- multicorner
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- verify_lvs
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- parasitics_command
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- techlibnamea
- analyze_rail
- timebased
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- unresolve
- 孰错呢
- timeDesign
- untested
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- NLH
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- existing
- 在整个
- 中占
- finout
- 打法
- ccs_lib
- 可以根据
- hold_time
- IOassignment
- 想流片
- route_zrt_detail
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- 设线载
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- zroute
- 求问下用
- route_global
- set_clock_tree_exceptions
- 经验值
- fillers
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- cadenceIC
- TSMC65gp
- 与传统
- 看网表
- WNS
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- 粗线条
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- unmatched
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- route_flip_chip
- 就有
- 怎麼解決
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- verbose
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- route_zrt_group
- 这步
- 就为
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- redundant
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- 延伸到
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- 层要宽
- create_power_waveforms
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- 肿么办啊
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- instname
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- locate
- MOS_VAR
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- ICC10lab
- Estimated
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- whole_chip
- IOPATH
- 往下
- 集成电路计算机
- clkgate
- insert_redundant_via
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- 活性
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- 概论
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- physical_design
- postlayout
- SOCCK
- 一导就错
- saygood
- traced
- 也搞个
- 这能
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- Columbus
- 請教有關
- 請適中
- 絕對不
- set_congestion_options
- incorrect
- TIELOW
- weltap
- cb13fs120_tsmc_max
- 当我
- 收尾
- verifyGeometric
- LM_license_file
- cshell
- ideal_network
- 坐一坐
- 聊一聊啊
- 链长
- 下写个
- 最有效
- 放不下
- smashs
- synopsys_pr_setup
- PrimeRail
- risk_chip
- clockpad
- 跟单
- tining
- 单元和
- auVerilogToCell
- 執行
- TIEHiLo
- keepShape
- quickcap
- 遇上了
- 又让
- vil
- vih
- 上一步
- 只需
- 下去了
- tming
- 发标
- Mikyway
- feed_through
- 是个什么东西
- AND2ST3X
- set_clock_group
- input_pins
- update_clock_latency
- PrimeTimePX
- 线后有
- 六百多
- sync_pin
- dereate
- blcok
- signalstorm
- 过紧
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- 咨询工程师
- runQRC
- 网表能
- 低版本
- Rectilinear
- PrimeTimeSI
- texted
- startc
- 或不
- typical
- get_cell
- DSMA
- 网络综合
- 网标中
- powerswitch
- mtb
- VSSH
- derate
- 紧张
- PowerPlan
- 遍了
- report_delay_calculation
- extract_rc
- timing_path
- corrupted
- hold_fix_m
- write_def
- bcwc
- M1_SUB
- M1_SP
- increase
- legalize
- legalize_placment
- 哪些因素
- 奥妙
- PT_check
- get_attr
- createrouteblk
- fligtline
- PROPT_VERBOSE
- SOT_VERBOSE
- clock_pulse_width
- TIE_connection
- 选调生
- 某省
- propagate_constraints
- characterize
- 树结构
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- 是咋想
- set_annotated_latency
- set_auto_disable_drc_nets
- set_dont_touch_network
- uncertain
- create_fp_placement
- essential
- rigorous
- set_annotated_delay
- 段生成
- holdup
- 老话
- FILLERC
- target_early_delay
- clock_trees
- RTL_DC
- 带网表
- lib2saif
- 下做后仿
- set_min_capacitance
- single_via
- straps
- 我作
- 中等
- save_mw_cell