clock_int函数用于设置MPLL，2440A的输入时钟频率Fin为12Mhz，将FCLK，HCLK，PCLK分别设为200MHz，100MHz，50MHz
思路：分频就是2步
1）：设置MPLL（把12MHz倍频）
2）：设置CLKdivN（把MPLL分频）
#include "s3c24xx.h"
void disable_watch_dog(void);
void clock_init(void);
void memsetup(void);
void copy_steppingstone_to_sdram(void);
void disable_watch_dog(void)
{
WTCON = 0; // 关闭WATCHDOG很简单，往这个寄存器写0即可
}
#define S3C2410_MPLL_200MHZ ((0x5c<12)|(0x04<4)|(0x00))
#define S3C2440_MPLL_200MHZ ((0x5c<12)|(0x01<4)|(0x02))
void clock_init(void)
{
// LOCKTIME = 0x00ffffff; // 使用默认值即可
CLKdivN = 0x03; // FCLK:HCLK:PCLK=1:2:4, HdivN=1,PdivN=1
__asm__(
"mrc p15, 0, r1, c1, c0, 0"
"orr r1, r1, #0xc0000000"
"mcr p15, 0, r1, c1, c0, 0"
);
if ((GSTATUS1 == 0x32410000) || (GSTATUS1 == 0x32410002))
{
MPLLCON = S3C2410_MPLL_200MHZ;
}
else
{
MPLLCON = S3C2440_MPLL_200MHZ;
}
}
void memsetup(void)
{
volatile unsigned long *p = (volatile unsigned long *)MEM_CTL_BASE;
p[0] = 0x22011110; //BWSCON
p[1] = 0x00000700; //BANKCON0
p[2] = 0x00000700; //BANKCON1
p[3] = 0x00000700; //BANKCON2
p[4] = 0x00000700; //BANKCON3
p[5] = 0x00000700; //BANKCON4
p[6] = 0x00000700; //BANKCON5
p[7] = 0x00018005; //BANKCON6
p[8] = 0x00018005; //BANKCON7
p[9] = 0x008C04F4;
p[10] = 0x000000B1; //BANKSIZE
p[11] = 0x00000030; //MRSRB6
p[12] = 0x00000030; //MRSRB7
}
void copy_steppingstone_to_sdram(void)
{
unsigned int *pdwSrc = (unsigned int *)0;
unsigned int *pdwDest = (unsigned int *)0x30000000;
while (pdwSrc < (unsigned int *)4096)
{
*pdwDest = *pdwSrc;
pdwDest++;
pdwSrc++;
}
}
