克服模拟集成电路的电气过应力
这个视频是德州仪器精密模拟性应用组的高级应用工程师Thomas Kuehl主讲,向各位介绍如何克服模拟集成电路的电气过应力。
当设计一个电路时,我们不但需要检查电气技术规格,而且需要检查集成电路的绝对最大定额值。
让我们一起来看看Thomas Kuehl有什么赞的观点吧!同时也欢迎点击http://focus.ti.com/cn/general/docs/video/Portal.tsp?lang=cn&entryid=1_8rdb0wvb查看更多相关的技术视频
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还好二极管和电阻都在电路中用了
这两天正好用了两个德州的运放集成电路,共四个运放
不过自己热转印自制电路板,有个线路腐浊断了,放了一段时间,以后又忘了,正好是一个运放集成片的正电源断了,结果查找了半天,但是好像没有坏,不知道对性能有何影响。
碰到专家了,顺带问个问题:
msp430G2系列,指导手册中有这样一段:
The MSP430 devices have several low-power modes. Different clock signals are available in different
low-power modes. The requirements of the user’s application and the type of clocking used determine
how the WDT+ should be configured. For example, the WDT+ should not be configured in watchdog mode
with SMCLK as its clock source if the user wants to use low-power mode 3 because the WDT+ will keep
SMCLK enabled for its clock source, increasing the current consumption of LPM3. When the watchdog
timer+ is not required, the WDTHOLD bit can be used to hold the WDTCNT, reducing power consumption.
但是在哪里查到底多少功耗呀?
呃,这里是模拟专家,应该问其他人?发了还是发了吧