用verilog-A仿真hspice软件手册上自带例子出错，求解答
时间：10-02
整理：3721RD
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大家帮忙看一下：用hspice仿真手册上面自带的例子出错是什么原因
**warning** *pvaW* there is no module.
**error** (d:\hspice\project\jfet\jfet.sp:9) Definition of model/subckt "jfet" is not found for the element "x1". Please specify a defined model/subckt name.
sp文件
.hdl jfet.va
.options post=1
VCC d 0 3.0
VGg 0 0.5
VSs 0 0.0
X1 d g s jfet Vto=-2.0 Beta=1.1e-4 Lambda=0.01
.dc VCC 0 4 0.01VG -2.0 0.0 0.5
.print I(VCC)
.end
va文件
`include "constants.vams"
`include "disciplines.vams"
module jfet(d,g,s);
parameter real Vto=-2.0from (-inf:inf);// Threshold voltageparameter
parameterreal Beta=1.0e-4from [0:inf);// Transconductanceparameter
parameterreal Lambda=0.0from [0:inf);// Channel modulation
electrical d,g,s;
realId,Vgs,Vds;
analog begin
Vgs=V(g,s);
Vds=V(d,s);
if(Vds<=Vgs-Vto)
Id=Beta*(1+Lambda*Vds)*Vds*(2*(Vgs-Vto)-Vds);
else if(Vgs-Vto<Vds)
Id=Beta*(1+Lambda*Vds)*(Vgs-Vto)*(Vgs-Vto);
I(d,s)<+Id;
end
endmodule
**warning** *pvaW* there is no module.
**error** (d:\hspice\project\jfet\jfet.sp:9) Definition of model/subckt "jfet" is not found for the element "x1". Please specify a defined model/subckt name.
sp文件.hdl jfet.va
.options post=1
VCC d 0 3.0
VGg 0 0.5
VSs 0 0.0
X1 d g s jfet Vto=-2.0 Beta=1.1e-4 Lambda=0.01
.dc VCC 0 4 0.01VG -2.0 0.0 0.5
.print I(VCC)
.end
va文件
`include "constants.vams"
`include "disciplines.vams"
module jfet(d,g,s);
parameter real Vto=-2.0from (-inf:inf);// Threshold voltageparameter
parameterreal Beta=1.0e-4from [0:inf);// Transconductanceparameter
parameterreal Lambda=0.0from [0:inf);// Channel modulation
electrical d,g,s;
realId,Vgs,Vds;
analog begin
Vgs=V(g,s);
Vds=V(d,s);
if(Vds<=Vgs-Vto)
Id=Beta*(1+Lambda*Vds)*Vds*(2*(Vgs-Vto)-Vds);
else if(Vgs-Vto<Vds)
Id=Beta*(1+Lambda*Vds)*(Vgs-Vto)*(Vgs-Vto);
I(d,s)<+Id;
end
endmodule
如果路径没有问题，貌似看不出问题来
是不是放在同一路径下的
hspice 2014
I use this file
simulation owrk ..
是在同一路径下的
那感觉是版本的问题我用的2011的可以共享个安装包和破解文件吗