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spectre下veriloga仿真报错

时间:10-02 整理:3721RD 点击:
我用的是5141,按照这篇博客上说的,http://www.eetop.cn/blog/html/34/840234-23976.html,建立了一个veriloga的symbol,然后在schematic中打开,设了一些参数,仿真之后报错:
Command line:
/home/cadence/mmsim61/tools.lnx86/spectre/bin/32bit/spectre -env\
artist5.1.0 +escchars +log ../psf/spectre.out +inter=mpsc\
+mpssession=spectre7_5372_3 -format sst2 -raw ../psf +lqtimeout\
900 -maxw 5 -maxn 5 input.scs
spectre pid = 5077
Loading /home/cadence/mmsim61/tools.lnx86/cmi/lib/4.0/libinfineon_sh.so ...
Loading /home/cadence/mmsim61/tools.lnx86/cmi/lib/4.0/libnortel_sh.so ...
Loading /home/cadence/mmsim61/tools.lnx86/cmi/lib/4.0/libphilips_sh.so ...
Internal error found in spectre.Please run `getSpectreFiles' or send the netlist, the spectre log file, the behavioral model files, and any other information that can help identify the problem to support@cadence.com.
Segmentation fault.
本人还是初学,对于报错信息不太了解,大家帮忙看看,到底是参数问题,还是另外的问题?

博客地址,拿走。谢小编

小编还有其他使用spectre软件的入门资料或者网址么?

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