ADS下的VERILOG-A mosfet
时间:10-02
整理:3721RD
点击:
>vamscomp -amswork d:\mos_wrk\.netlist.ams_work -S D:/mos_wrk/veriloga/mos.va
Error: syntax error, unexpected '<+'
['D:/mos_wrk/veriloga/mos.va',99]
Ich2 <+ (KF2*KP2*((VGS-VT2)*VDIS-pow(LINSAT,kx2-1)*pow((VGS-VT2),((2-kx2)/kx2)))/(1+THESAT1*(VGS-VT2)));
^^
'vamscomp' failed with exit with status 1.
--------------------
Simulation terminated due to error.
目标是veriloga 完成 mosfet level1 目前问题如上
另外Cadence中的veriloga 库具体位置在哪里的 找不见..
谢
Error: syntax error, unexpected '<+'
['D:/mos_wrk/veriloga/mos.va',99]
Ich2 <+ (KF2*KP2*((VGS-VT2)*VDIS-pow(LINSAT,kx2-1)*pow((VGS-VT2),((2-kx2)/kx2)))/(1+THESAT1*(VGS-VT2)));
^^
'vamscomp' failed with exit with status 1.
--------------------
Simulation terminated due to error.
目标是veriloga 完成 mosfet level1 目前问题如上
另外Cadence中的veriloga 库具体位置在哪里的 找不见..
谢
还有 <+换成 = 也是错的