hspice仿真报错重复定义‘nch3.1’,在线等求助!
时间:10-02
整理:3721RD
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我使用的是TSMC。18工艺,hspice2012版本,linux下进行。仿真报错 **error** (/home/will/Desktop/mm018.l:2004)duplicated model definition 'nch3.1'
在线等,求助!
我的原输入文件是:
***** Project: TWo-STAGE OPAMP *****
$.lib 'C:\synopsys\smic90nm\ms009_io33_rf_v0p1.lib' TT
$.lib '/home/will/Desktop/mcd2013.lib' TT
.lib '/home/will/Desktop/mm018.l' TT_3V
$.lib '/home/will/Desktop/mm0355v.l' TT
***** Power Supply 3.3V *****
.param Vdd=3.3v
.param W1=17.6u L1=1.9u
.param W2=17.6u L2=1.9u
.param W3=3.5u L3=3.4u
.param W4=3.5u L4=3.4u
.param W5=9.9u L5=1.4u
.param W6=20u L6=1.9u
.param W7=52u L7=1.5u
.param W8=12u L8=1.5u
$.param W9=3.2u L9=1u
$.param W10=6u L10=1u
$.param W11=6u L11=1u
$.param W12=24u L12=1u
$.param W13=6u L13=1u
$.param W14=20u L14=1u
$.param Rbb=6k
.subckt opamp vp vn out vdd vss
M1 2 vn 1 1 pchL=L1 W=W1
M2 3 vp 1 1 pchL=L2 W=W2
M3 2 2vss vss nchL=L3 W=W3
M4 3 2vss vss nchL=L4 W=W4
M5 1 6vdd vdd pchL=L5 W=W5
M6 out 3vss vss nchL=L6 W=W6
M7 out 6vdd vdd pchL=L7 W=W7
***** Current Bias independent of Power Supply *****
M87 7 vdd vdd pchL=L8 W=W8
Ib 7 vss 5.75u
$M97 6 vdd vdd PCH3 L=L9 W=W9
$M10 6 78vss NCH3 L=L10 W=W10
$M11 7 79vss NCH3 L=L11 W=W11
$M12 8 9 10vss NCH3 L=L12 W=W12
$M13 9 9 vss vss NCH3 L=L13 W=W13
$RB 10 vss Rbb
***** Miller Compensation, Zero Cancellation Compensation *****
CC 3 out 0.3pf
$M14 4 7 3 3 vss nchL=L14 W=W14
$Rc 8 out
CL out vss 1pf
.ends
$.lib 'C:\synopsys\smic90nm\ms009_io33_rf_v0p1.lib' TT
$.lib '/home/will/Desktop/mcd2013.lib' TT
.lib '/home/will/Desktop/mm018.l' TT_3V
.lib '/home/will/Desktop/mm0355v.l' TT
.options list node post
.op
X1 vn vp out vdd vss opamp
vp vp 0 dc 2.5 ac 1
vn vn 0 dc 2.5
.ac dec 10 1k 100meg
.print ac vdb(out) vp(out)
.measure ac GBW when vdb(out)=0
.measure ac VPW when vp(out)=-120
.end
在线等,求助!
我的原输入文件是:
***** Project: TWo-STAGE OPAMP *****
$.lib 'C:\synopsys\smic90nm\ms009_io33_rf_v0p1.lib' TT
$.lib '/home/will/Desktop/mcd2013.lib' TT
.lib '/home/will/Desktop/mm018.l' TT_3V
$.lib '/home/will/Desktop/mm0355v.l' TT
***** Power Supply 3.3V *****
.param Vdd=3.3v
.param W1=17.6u L1=1.9u
.param W2=17.6u L2=1.9u
.param W3=3.5u L3=3.4u
.param W4=3.5u L4=3.4u
.param W5=9.9u L5=1.4u
.param W6=20u L6=1.9u
.param W7=52u L7=1.5u
.param W8=12u L8=1.5u
$.param W9=3.2u L9=1u
$.param W10=6u L10=1u
$.param W11=6u L11=1u
$.param W12=24u L12=1u
$.param W13=6u L13=1u
$.param W14=20u L14=1u
$.param Rbb=6k
.subckt opamp vp vn out vdd vss
M1 2 vn 1 1 pchL=L1 W=W1
M2 3 vp 1 1 pchL=L2 W=W2
M3 2 2vss vss nchL=L3 W=W3
M4 3 2vss vss nchL=L4 W=W4
M5 1 6vdd vdd pchL=L5 W=W5
M6 out 3vss vss nchL=L6 W=W6
M7 out 6vdd vdd pchL=L7 W=W7
***** Current Bias independent of Power Supply *****
M87 7 vdd vdd pchL=L8 W=W8
Ib 7 vss 5.75u
$M97 6 vdd vdd PCH3 L=L9 W=W9
$M10 6 78vss NCH3 L=L10 W=W10
$M11 7 79vss NCH3 L=L11 W=W11
$M12 8 9 10vss NCH3 L=L12 W=W12
$M13 9 9 vss vss NCH3 L=L13 W=W13
$RB 10 vss Rbb
***** Miller Compensation, Zero Cancellation Compensation *****
CC 3 out 0.3pf
$M14 4 7 3 3 vss nchL=L14 W=W14
$Rc 8 out
CL out vss 1pf
.ends
$.lib 'C:\synopsys\smic90nm\ms009_io33_rf_v0p1.lib' TT
$.lib '/home/will/Desktop/mcd2013.lib' TT
.lib '/home/will/Desktop/mm018.l' TT_3V
.lib '/home/will/Desktop/mm0355v.l' TT
.options list node post
.op
X1 vn vp out vdd vss opamp
vp vp 0 dc 2.5 ac 1
vn vn 0 dc 2.5
.ac dec 10 1k 100meg
.print ac vdb(out) vp(out)
.measure ac GBW when vdb(out)=0
.measure ac VPW when vp(out)=-120
.end
网表里面
.lib '/home/will/Desktop/mm018.l' TT_3V
好像调用了两次, 可能重复了.
YES
duplicated model definition
是的,确实重复了,非常感谢! 已经能够正常仿真了!
是的,感谢!已经可以啦
太牛逼了
真是太牛逼了拉