delta-sigma调制器求助

有哪位做过混合的delta-sigma调制器没，比如三阶单环调制器，要把第一级改成连续，后两级用开关电容的，该如何做呀，比如第一级系数是0.4，时钟是5MHz，第一级连续滤波器的电阻和电容值该如何设置?在线等待回答。

I have done a second-order hybrid one to achieve more than 100dB SNDR. Crystal accuracy is important.
The first stage C can be pre-chosen according to the KT noise; the R can be mapped by full-scale range together with the coefficient.

没做过模拟的，搞过数字delta-sigma

请原谅，没太看明白。假如第一级的系数是0.4才能实现我想要的NTF，现在时钟频率为5MHZ，第一级的连续滤波器的电容选为5PF，请为R值应该是多少?R值的选择与时钟频率有没有关系。期待您的再次回答。

(1/s*Ts*R*C)
so that R=Ts/(0.4*C)

The difficult part is how to calculate the current of the feedback current-steering DAC. You will need to use the full-scale voltage to calculate, I remember.

R=83.3333 kohm

R=0.2us/(5PF*0.4)不是等于100K ohms吗?，怎么会是83.333K ohms呢?
我做的是三阶单环一位的。
感谢您的回答。

这种结果有什么好处?
至于r怎么取，应该还是脉冲响应不变的原则。
假定nrz的dac，在ct情况下，输出波形是先以I对c积分一个周期，然后保持不变，对此采样后就是一个离散的delay1个clk的阶跃，值是It/c。在dt下，输出也是一个阶跃，值是vref*0.4。令二者相等。

This is the R for the integrator, not the k for the feedback DAC. If the first DT integrator is delayed i.e. H(z)=1/(z-1), it shall be able to map to 1/s directly to form a hybrid SDM.
I remember that the k is calculated with Vref (full scale), together with the C in my previous design.