請問關於CC2541 memory的架構

如題，我用的是CC2541

查看SPEC應該是有256KB的flash與8KB的SRAM

可我在ch2中看到，

CODE. A read-only memory space for program memory. This memory space addresses 64 KB.
DATA. A read-or-write data memory space that can be directly or indirectly accessed by a single-cycle CPU instruction. This memory space addresses 256 bytes. The lower 128 bytes of the DATA memory space can be addressed either directly or indirectly, the upper 128 bytes only indirectly.
XDATA. A read-and-write data memory space, access to which usually requires 4–5 CPU instruction cycles. This memory space addresses 64 KB. Access to XDATA memory is also slower than DATA access, as the CODE and XDATA memory spaces share a common bus on the CPU core, and instruction prefetch from CODE thus cannot be performed in parallel with XDATA accesses.
SFR. A read-or-write register memory space which can be directly accessed by a single CPU instruction. This memory space consists of 128 bytes. For SFR registers whose address is divisible by eight, each bit is also individually addressable.

這裡寫的CODE指的是ROM，共64KB，餘下的DATA、XDATA與SFR我就把它當作是RAM，請問這好像跟256KB的flash與8KB的SRAM對不上。

又下面列的三個圖當中的，BANK指的是什麼? 是total有256KB，分成32KB一BANK ，故共用8BANK = 256KB嗎?

Figure 2-1. XDATA Memory Space (Showing SFR and DATA Mapping)

Figure 2-2. CODE Memory Space

Figure 2-3. CODE Memory Space for Running Code From SRAM

由于内部sram只有8k，空间0x8000后可以映射到 flash bank0（默认）。