微波EDA网,见证研发工程师的成长!
首页 > 研发问答 > 嵌入式设计讨论 > FPGA,CPLD和ASIC > 急盼大虾帮助!

急盼大虾帮助!

时间:10-02 整理:3721RD 点击:
subtype word is std_logic_vector(data_width - 1 downto 0);
type memory is array(2**adr_width - 1 downto 0)of word;
逻辑综合同步过:
non locallystatic bounds are not supported
这是什么原因呀?

[求助]急盼大虾帮助!
你把data-width和adr-width改为实际的数值应该可以吧

[求助]急盼大虾帮助!
both the data_width and adr_width have to be defined as either constants or generics.
When defined as generics, as I remembered, you should use "analyze" and "elaborate" rather than "read" to input your design.

Copyright © 2017-2020 微波EDA网 版权所有

网站地图

Top