synopsys安装问题,LICENSE通不过,请各位大神解答
REDHL安装SYNOPSYS软件,用的是SCL_11.9版本,运行#lmgrd -c /software/synopsys/license/synopsys.dat 时总是报。
17:38:03 (snpslmd) LMCSwift_NetCoverMeterCoverMeterOBC
17:38:03 (snpslmd) VCSAMSCompiler_Net VCSAMSRuntime_Net VT_Assertions
17:38:03 (snpslmd) SNPS-Assertions VT_TestbenchVT_Systemverilog
17:38:03 (snpslmd) VCSMXRunTime_Net VCSMXiRunTime_Net Magellan-Sim
17:38:03 (snpslmd) VT_SVDesignVT_SVAssertions VT_SVTestbench
17:38:03 (snpslmd) VT_NativeTestbench VT_DVEVT_UCLI
17:38:03 (snpslmd) VT_TestbenchRuntime VT_LCA_Testbench PVCSCompiler_Net
17:38:03 (snpslmd) PVCSRuntime_Net VT_VCS_Power_Management VT_VCS_Checker
17:38:03 (snpslmd) VT_VCS_EchoVhdl-ToolsCmMonitor
17:38:03 (snpslmd) hspicehspice_cosimhspice_adv
17:38:03 (snpslmd) hspicewinencryptmetaencrypt3des
17:38:03 (snpslmd) hspicevahspicerfCOSMOS_SCOPE
17:38:03 (snpslmd) COSMOS_GUIDECXp_GUICXp_Analysis
17:38:03 (snpslmd) CXp_CircuitEnvironment him_modhim_mm_pi
17:38:03 (snpslmd) him_mb
17:38:03 (snpslmd)
17:38:03 (snpslmd) Licenses are case sensitive for TE_CATS
17:38:03 (snpslmd)
17:38:03 (snpslmd) EXTERNAL FILTERS are OFF
17:38:06 (snpslmd) Vendor daemon can't talk to lmgrd (Cannot connect to license server system. (-15,570:115 "Operation now in progress"))
17:38:06 (snpslmd) EXITING DUE TO SIGNAL 37 Exit reason 5
17:38:06 (lmgrd) snpslmd exited with status 37 (Communications error)
17:38:06 (lmgrd) Please correct problem and restart daemons
lic.data设置为:
SERVER localhost.localdomAIn 000c29974ff0 27000
DAEMON snpslmd /software/synopsys/scl11.9/linux/bin/snpslmd
#
FEATURE SSS snpslmd 1.0 31-dec-2020 uncounted EF6023CDBBD22F9E8FAF \
VENDOR_STRING="69656 d1d88 34cc3 36d92 e9f0a 04587 634bd 6366c \
96b0f e71" HOSTID=000c29974ff0 ISSUER="Team ZWT 2006" \
NOTICE="Licensed to mammoth//ZWT 2006 [PLEASE DO NOT DELETE THIS \
SSS KEY]" SN=RK:1978-0:001224:0 START=1-jan-2006
FEATURE nanochar snpslmd 2020.12 31-dec-2020 uncounted FF00E3FDA4DAA74D35D1 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=70 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE hspice_pack snpslmd 2020.12 31-dec-2020 uncounted 4F9063FDA4778D882576 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=44 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE cosmos_other snpslmd 2020.12 31-dec-2020 uncounted 3F6043BDB0435BD1D621 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=23 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE SABER_GUIDE snpslmd 2020.12 31-dec-2020 uncounted 1F5083BD230E9A68855E \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=241 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE cxp snpslmd 2020.12 31-dec-2020 uncounted 8F50632D57CECBA31AD7 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=9 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_VCS_cmv snpslmd 2020.12 31-dec-2020 uncounted EF60E3FDCAE483C2C5AA \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=77 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_VCS_main_0 snpslmd 2020.12 31-dec-2020 uncounted 1F00E3ADAA769D36C84E \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=11 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_VCS_main_1 snpslmd 2020.12 31-dec-2020 uncounted EF90F30D639454D03074 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=7 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_0 snpslmd 2020.12 31-dec-2020 uncounted 7FD0832D5DE01BD32542 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=15 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_1 snpslmd 2020.12 31-dec-2020 uncounted AF30434D1F8E0A90CAE8 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=245 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_2 snpslmd 2020.12 31-dec-2020 uncounted 7F5013AD64E7DB7D6E18 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=26 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_3 snpslmd 2020.12 31-dec-2020 uncounted EF70D39D8EA5FA2F95BC \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=118 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_4 snpslmd 2020.12 31-dec-2020 uncounted EF50131DD9D4D3483124 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=243 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_5 snpslmd 2020.12 31-dec-2020 uncounted 2F30632DB33F1218D683 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=23 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_6 snpslmd 2020.12 31-dec-2020 uncounted BFD0839D7842D3766B38 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=52 \
SN=RK:2671-0:167603:0 START=1-jan-2006
FEATURE Synopsys_main_7 snpslmd 2020.12 31-dec-2020 uncounted 2FF0D3FD3281B237C093 \
VENDOR_STRING=^1+S&PID=985f0fcc& HOSTID=000c29974ff0 SUPERSEDE ISSUED=02-dec-2003 ck=29 \
SN=RK:2671-0:167603:0 START=1-jan-2006
#---------------------
PACKAGE nanochar snpslmd 2020.12 3010605199C0D126992A COMPONENTS="him_mod him_mm_pi him_mb him_sml \
PrimeTime-SI " ck=129
PACKAGE cxp snpslmd 2020.12 901020D1D5D00BB558E0 COMPONENTS="CXp_GUI CXp_Analysis \
CXp_CircuitEnvironment" ck=140
PACKAGE cosmos_other snpslmd 2020.12 D050003132761872D038 COMPONENTS="COSMOS_SCOPE COSMOS_GUIDE" \
ck=141
PACKAGE hspice_pack snpslmd 2020.12 10A0F0E12D2B683B3C97 COMPONENTS="hspice hspice_cosim hspice_adv \
hspicewin encrypt metaencrypt3des hspiceva hspicerf" ck=229
PACKAGE Synopsys_VCS_cmv snpslmd 2020.12 E09080D14568A17B5248 COMPONENTS="VCSTools_Net VHDL-Tools \
CmMonitor" ck=185
PACKAGE Synopsys_VCS_main_0 snpslmd 2020.12 20D0C041A6E96C8E0394 COMPONENTS="VCSCompiler_Node \
VCSRuntime_Node VCSRuntimeLimited_Node VCSNativeCode_Node VCSCompiler_Net VCSRuntime_Net \
VCSRuntimeLimited_Net VCSNativeCode_Net VCSiCompiler_Node VCSiRuntime_Node VCSiDebugger_Node \
VCSiRuntimeLimited_Node VCSiCompiler_Net VCSiRuntime_Net VCSiDebugger_Net \
VCSiRuntimeLimited_Net VCSDebugger_Node VCSParallelCompiler_Node VCSParallelRuntime_Node \
VCSParallelThread_Node VCSTools_Node VCSlm_Hm_Node VCSPostProcDebugger_Node VCSDebugger_Net \
VCSParallelCompiler_Net VCSParallelRuntime_Net VCSParallelThread_Net VCSTools_Net \
VCSlm_Hm_Net VCSPostProcDebugger_Net VMCCompiler_Node VMCRuntime_Node VMCEvaluation_Node \
VMCGeneratorUnlocked_Node VMCExpress_Compiler_Node VMCCompiler_Net VMCRuntime_Net \
VMCEvaluation_Net VMCGeneratorUnlocked_Net VMCExpress_Compiler_Net DesignWare LMCSwift_Node \
LMCSwift_Net CoverMeter CoverMeterOBC VCSAMSCompiler_Net VCSAMSRuntime_Net VT_Assertions \
SNPS-Assertions VT_Testbench VT_SystemVerilog VCSMXRunTime_Net VCSMXiRunTime_Net \
Magellan-Sim VT_SVDesign VT_SVAssertions VT_SVTestbench VT_NativeTestbench VT_DVE VT_UCLI \
VT_TestbenchRuntime VT_LCA_Testbench PVCSCompiler_Net PVCSRuntime_Net \
VT_VCS_Power_Management VT_VCS_Checker VT_VCS_Echo" ck=215
PACKAGE Synopsys_VCS_main_1 snpslmd 2020.12 4060B0018DD714D0A755 COMPONENTS="RMAN_RUN VT_VCS_NTBE \
XVVCDebugger VCSCompiler VCSRuntime VCSRuntimeLimited VCSNativeCode VCSiCompiler VCSiRuntime \
VCSiRuntimeLimited VCSParallelCompiler VCSParallelRuntime VCSParallelThread VMCCompiler \
VMCRuntime VMCEvaluation VCSTools VCSlm_Hm LMCSwift VCSPostProcDebugger VMCGeneratorUnlocked \
VMCExpress_Compiler VCSAMSCompiler VCSAMSRuntime VT_UnifiedCoverage VT_64Bit \
VT_OtherTechnology VT_CoverageURG VT_NativeTBDebuggerGui VT_NTB VT_CBUG VT_Visual \
VT_SVAssertionCompiler VT_SDebug VT_Coverage VT_DVENTB VT_Pioneer VT_AssertionIP \
VT_SYSTEMC21 VT_AssertionsRuntime VT_CoverageRuntime VT_LCA_Coverage VT_LCA_DEBUG \
VT_LCA_Assertions VT_LCA_Language VT_LCA_MixedSignal vera_rtime VT_DVE_COV \
VT_VCS_BETA_Features VT_VCS_LCA_Features VT_VCS_Advanced_Features VT_VCS_BETA_Program \
VT_PVCSCompiler_Net VCSOldPostProcDebugger_Node FusionVantageLmcInterface VCSCompile \
VCSiCompile VCSOldPostProcDebugger_Net vsecP_OEM_VCS_FUJITSU_GEN_NL \
vsecP_OEM_VCS_FUJITSU_RUN_NL vsecP_OEM_VCS_FUJITSU_USE_NL vsecP_OEM_VCS_FUJITSU_GEN_NW \
vsecP_OEM_VCS_FUJITSU_RUN_NW vsecP_OEM_VCS_FUJITSU_USE_NW XVCSiDebugger XVCSDebugger \
VCS-Express-Compile VCS-Express-Runtime" ck=155
PACKAGE Synopsys_main_0 snpslmd 2020.12 3070D0F160083D1ED4F2 COMPONENTS="WRITE CTV-Interface \
DC-Cadence-Interface DC-Expert DC-Falcon-Interface DC-layout-Interface DC-SDF-Interface \
Design-Analyzer Design-Compiler Designware-Basic Designware-FPGA-Basic DW-Developer \
DesignWare-FloatingPoint DesignWare-8051 DesignWare-8051-Source DesignWare-PCI \
DesignWare-PCI-Source ECL-Compiler FPGA-Compiler FPGA-Library-Compiler FPGA-Option HDL \
HDL-Compiler Interface-Shell Library-Compiler LSI-Interface Mentor-Interface \
SGE-DC-Interface SGE-EDIF-Interface SGE-VHDL-Interface SGE-Verilog-Interface SynLib-ALU \
SynLib-AdvMath SynLib-Eval SynLib-Seq Synopsys Synopsys-Queue Synopsys-Release TDL-Interface \
Test-ATPG Test-Custom-Protocols Test-Compiler Test-Compiler-Remodel Test-Compiler-Plus \
DesignTime VHDL-Compiler VSS-Analyzer VSS-CLI VSS-Cadence-Interface VSS-Debugger \
VSS-Falcon-Interface VSS-LAI-Models VSS-LMSI VSS-Lib-Tools VSS-SDF-Interface VSS-SGE-Tool \
VSS-Simulator VSS-Utilities VSS-Wave-Display VSS-XP-Accelerator VSS-VIP-Interface \
VSS-GateSim VSS-CompiledSim VSS-SPC VSS-Verilog-PLI Floorplan-Management SNPS-Keygen \
SynLib-FltTol SynLib-Control TestSim TestManager Leakage-Power Power-Analysis \
electromigration_drc VSS-Model-Developer CD-Model-Developer CD-Compiled-Sys-Gen \
CD-Compiled-Lib-Gen CD-Present-Layer-Gen CD-Present-Builder CD-Vhdlgen-Gen CD-Vhdlgen-GUI \
Behavioral-Compiler VSS-SmartModels DC-Min-Area-Retime DesignWare-PCIbasic SynLib-PCIbasic \
SynLib-dspFIR" ck=167
PACKAGE Synopsys_main_1 snpslmd 2020.12 50D0208164E4CB60D50E COMPONENTS="SynLib-VHDLSimMdl \
SynLib-VerilogSimMdl FPGA-HDL-Bundle FPGA-VHDL-Bundle VSS-Tran VSS-NEC-Tran \
CD-MSSC-Cross-Probe CD-MSSC-Netlist CD-GDII-Link Test-IDDQ Test-BIST Test-BSDL \
Power-Optimization DC-Beta HDL-Advisor ECO-Compiler DesignSource DS-Schem-Gen DS-Verinet \
DS-Vhdlnet HDL-Advisor-Shell HDL-Advisor-Shell-Package HDL-Advisor-Package \
DesignSource-Package DS-Schem-Gen-Package DS-Verinet-Package DS-Vhdlnet-Package EDIF-Reader \
EDIF-Netlist-Writer EDIF-Schematic-Writer VHDL-Netlist-Writer Verilog-Netlist-Writer \
TDL-Reader TDL-Writer Espresso-Reader Espresso-Writer Equation-Reader Equation-Writer \
FSM-Reader FSM-Writer MIF-Reader MIF-Writer VHDL-To-BE VHDL-Analyzer Parse-Tree-Translator \
Verilog-To-BE Verilog-Parser Cyclone-VHDL-Analyzer Cyclone-HDL-Analyzer Cyclone-Elaborator \
Cyclone-Simulator Cyclone-GUI Protocol-Compiler-UI Protocol-Compiler-Synth SGE-Tool \
Syn-Library-Compiler Cyclone-Core HDL-Advisor-Estimator HDL-Advisor-Shell-Estimator \
Estm-HDL-Advisor HDL-Advisor-Estimator-Package HDL-Advisor-Shell-Estm-Package \
DesignSource-Estimator-Package DS-Schem-Gen-Estimator-Package DS-Verinet-Estimator-Package \
DS-Vhdlnet-Estimator-Package Estm-HDL-Advisor-Package EDIF-Netlist-Read-DC \
EDIF-Netlist-Write-DC CD-GDI CD-REX TC-Beta ShortCut-DC-Pro ShortCut-DC-Expert \
TBM-Manager-UI TBM-VSS-Check BC-VHDL BC-HDL VSS-Backplane DesignWare-Ethernet \
DesignWare-Cardbus DesignWare-ISA-PnP DesignWare-8051MCU Protocol-Compiler-FML \
Power-Optimization-Upgrade Shortcut-FPGA DesignWare-Foundation BC-FPGA-HDL" ck=203
PACKAGE Synopsys_main_2 snpslmd 2020.12 1070102114AF894DD77F COMPONENTS="BC-FPGA-VHDL \
Vivace-Simulator Vivace-GUI Vivace-Elaborator Early-Access-Technology ECO-Compiler CA-Frame \
CA-Utils CA-Foundation CA-CP-Basic CA-CP-Standard CA-CP-Advanced CA-Chip-Edit \
CA-Optimization CA-Timer CA-Hier-Timer PrimeTime Design-Estimator Design-Estimator-FPI \
VDesktop-Verilog VDesktop-VHDL VDesktop-GUI VDesktop-Debug Vivace-HDL-Analyzer \
Vivace-VHDL-Analyzer Vivace-Model-Compiler Vivace-Core Vivace-Debug DW-IP-Developer \
DW-IP-Consultant ARKOS-Rtlcomp ARKOS-Scomp ARKOS-Mcomp ARKOS-Simul ARKOS-Ice ARKOS-A ARKOS-B \
ARKOS-C ARKOS-D ARKOS-E VDesktop-VCDTrans Vivace-Pro Vivace-Expert Vivace-Express \
Verification-Token Cyclone-Code-Generator Vivace-Code-Generator Mixed-Language \
Mixed-Paradigm Test-IEEE-Std-1149-1 HighLevel-Power-Analysis HighLevel-Power-Optimization \
DesignWare-MGI DesignWare-Developer-MGI BC-Schedule Behavioral-Analyzer \
DesignWare-Foundation-Expert RTL-Analyzer RTL-Analyzer-Shell RTL-Analyzer-DAP \
RTL-Analyzer-Shell-DAP Design-Analyzer-DAP Millennium-DRC Millennium-ATPG-STD Millennium-FS \
Millennium-ATPG-EE Millennium-Eval Millennium-Beta MC-Pro MC-Retime MCE MCE-Eval MCE-Base \
MCD DCM-Delay-Calculation Design-Budgeting DC-Ultra-Features DC-Ultra-Opt \
Protocol-Compiler-Analysis Protocol-Compiler-COutput Cyclone-cosim Stamp-Compiler \
DesignWare-Foundation-Power PrimeTime-Plus SNPS-MOTIVE MOTIVE-PrimeTime SNPS-CSL MC-Pro-RP" \
ck=198
PACKAGE Synopsys_main_3 snpslmd 2020.12 B0F070B1B05FBE8B01F8 COMPONENTS="Test-Analysis Test-Format \
Test-ScanRoute Test-Library Test-DFT-Top Test-Compile Test-Compile-Remodel Test-Analysis-RTL \
Test-Analysis-GUI Test-Mbist Test-Mbist-DRAM Test-Mbist-CAM Test-Mbist-FLASH \
Test-Mbist-Diagnosis Test-Mbist-Multiport Test-Mbist-Algorithm Test-ATPG-PRO Test-ATPG-XP \
Test-ATPG-Limited Test-ATPG-30 Test-ATPG-Ultra Test-Delay Test-Faultsim Test-Diagnosis \
Test-Accelerator Test-Faultsim-8L Test-Eval Test-Beta Test-CA Test-Beta-2 \
DesignWare-Foundation-Ultra VHMC-GenUnlocked VHMC-Eval VHMC-Runtime COSSAP_adpcm COSSAP_arm \
COSSAP_bde COSSAP_celp COSSAP_chart COSSAP_cw_filter_hdl COSSAP_cw_filter_sds COSSAP_dab \
COSSAP_dcg_ad21020 COSSAP_dcg_ansic COSSAP_dcg_ariel32c COSSAP_dcg_fe COSSAP_dcg_gc \
COSSAP_dcg_krc COSSAP_dcg_lsic30s COSSAP_dcg_m96000 COSSAP_dcg_mp COSSAP_ddk_arm \
COSSAP_ddk_devlp COSSAP_ddk_dsp1610 COSSAP_ddk_hawk COSSAP_ddk_nec COSSAP_ddk_oak \
COSSAP_ddk_pine COSSAP_ddk_ssp16xx COSSAP_ddk_tic5x COSSAP_ddk_tic5xx COSSAP_dect COSSAP_dvb \
COSSAP_ecc COSSAP_gsmdve COSSAP_gsmdve_utils COSSAP_gsmefrsc COSSAP_gsmeq COSSAP_gsmfrcc \
COSSAP_gsmfrsc COSSAP_gsmhrcc COSSAP_gsmhrsc COSSAP_gsmphy COSSAP_is136 COSSAP_is95 \
COSSAP_matlab COSSAP_mfd COSSAP_mpeg2 COSSAP_pdc COSSAP_qed COSSAP_sds COSSAP_srcfd \
COSSAP_vcg_generic COSSAP_vcg_synopsys COSSAP_vcg_vantage COSSAP_vdefcg COSSAP_vdefcg_vlgxl \
COSSAP_vsiccg" ck=252
PACKAGE Synopsys_main_4 snpslmd 2020.12 F010E0E11CBB0F7E6104 COMPONENTS="COSSAP_vsiccg_cyc \
COSSAP_vsiccg_mti COSSAP_vsiccg_vcs COSSAP_vsiccg_vlgxl COSSAP_vsivcg COSSAP_vsivcg_vlgxl \
COSSAP_xdcg COSSAP_xvcg COSSAP_xvsi Fridge-GUI Fridge-Simulation Fridge-Interpolator \
FPGA-Express FPGA-Express-32OODx-Optimizer FPGA-Express-A1200XL-Optimizer \
FPGA-Express-A1400-Optimizer FPGA-Express-A3200DX-Optimizer FPGA-Express-A42MX-Optimizer \
FPGA-Express-A54SX-Optimizer FPGA-Express-Constraint-Mgr FPGA-Express-EPF10k-Optimizer \
FPGA-Express-EPF6k-Optimizer FPGA-Express-EPF8k-Optimizer FPGA-Express-EPM7k-Optimizer \
FPGA-Express-EPM9k-Optimizer FPGA-Express-ORCA2-Optimizer FPGA-Express-ORCA3-Optimizer \
FPGA-Express-Open-Optimizer FPGA-Express-VHDL-Base FPGA-Express-VHDL-Training \
FPGA-Express-VIRTEX-Optimizer FPGA-Express-VLOG-Base FPGA-Express-XC3k-Optimizer \
FPGA-Express-XC4k-Optimizer FPGA-Express-XC5k-Optimizer FPGA-Express-XC9k-Optimizer \
FPGA-Express-GAT Formality CBA-Logical-DS CBA-Logical-MA CBA-Physical-DS CBA-Physical-MA \
CBA-Frame CBA-Blk-Import CBA-Blk-Export CBA-Transport CBA-ApolloGA-Interface \
CBA-CadenceSE-Interface ProMA-L1 ProMA-L2 ProMA-LD ProMA-P1 ProMA-P2 PSG-SDE CBA-DS-Beta \
ProMA-PD COSSAP_ddk_dsp16000 COSSAP_adsl COSSAP_vsiccg_mtivlg Test-RTL-Check DW-IP-DEBUG \
electromigration_drc ACS PhysOpt PhysOpt-Ultra PhysOpt-GUI BOA-BRT DesignWare-VERA \
VHDL-Event-Sim VHDL-Elaborator VHDL-Cycle-Sim VHDL-ScSim VHDL-VirSim ELGRECO_DesignCenter \
ELGRECO_Simulator ELGRECO_Davis Design-Vision FPGA-Express-EP20k-Optimizer \
FPGA-Express-isp1K-Optimizer FPGA-Express-isp2K-Optimizer FPGA-Express-isp3K-Optimizer \
FPGA-Express-isp5K-Optimizer FPGA-Express-isp6K-Optimizer FPGA-Express-isp8K-Optimizer \
FPGA-Express-APROA-Optimizer FCII-Altera-Edition DesignWare-PCI-X DesignWare-PCI-X-Source \
DesignWare-MPEG2-VDEC" ck=241
PACKAGE Synopsys_main_5 snpslmd 2020.12 20C01011324616516BB0 \
COMPONENTS="DesignWare-MPEG2-VDEC-Source DesignWare-MPEG2 DesignWare-MPEG2-Source \
DesignWare-SystemIO DesignWare-SystemIO-Source DesignWare-USB DesignWare-USB-Source \
DesignWare-USB2 DesignWare-USB2-Source DesignWare-1394 DesignWare-1394-Source \
DesignWare-ETHERNET DesignWare-ETHERNET-Source DesignWare-MemoryBist \
DesignWare-MemoryBist-Source COSSAP_amr DCExpert-PrimeTime PrimeTime-SI RTL-Power-Analysis \
DesignWare-MPEG DesignWare-MPEG-Source DesignWare-TCA DesignWare-TCA-Source DesignWare-BIST \
DesignWare-BIST-Source SC-BC SC-RTL Formality-Transit Formality-E1 Test-Map Test-Compile-Max \
Test-Compile-Share Test-ATPG-Max Test-Beta-3 Test-Beta-4 Test-Beta-5 Test-Beta-6 Test-CA-2 \
Test-CA-3 Test-CA-4 Test-PR-1 Test-PR-2 Test-PR-3 Test-PR-4 route66 encore HLS-SystemC \
HLS-FPGA-SystemC CoCentric-SYS-DesignCenter CoCentric-SYS-Simulator CoCentric-SYS-Davis \
CoCentric-SYS-HWSimIF CoCentric-SYS-HWflow COSIM-SRO COSIM-VCS COSIM-MTI COSIM-VXL COSIM-LFG \
COSIM-NCV CoCentric-FXD-Interpolator CoCentric-FXD-GUI CoCentric-FXD-Simulation \
CoCentric-SYS-RDK-adsl MC-Retime DC64 Constraint_Translation CoCentric-SYS-RDK-cdma2000 \
Formality-TransForm DesignWare-6811-Source FPGA-Express-MERCURY-Optimizer coreSynthesis \
coreAssembler coreBuilder coreConsultant SC-HLS CoCentric-SYS-RDK-docsis SC-COSIM PS_CTS \
PS_Noise_Optimization PS_Extraction Test-RTL-Tristate DesignWare \
FPGA-Express-APEX2-Optimizer Test-CTL-Model Test-Core-Wrapper Test-Core-Integration \
Test-LBIST-Synthesis PhysOpt-Beta" ck=169
PACKAGE Synopsys_main_6 snpslmd 2020.12 B0A0D0612BBC2685B63F COMPONENTS="BC-FPGA SC-FPGA DC-Ultra \
example_feature leda-mx Test-LBIST-ATPG DC-FPGA-Features Test-DFTC-TMAX PhysOpt-Hierarchy \
PhysOpt-Onroute PhysOpt-Parallel PhysOpt-SI Primepower Primepower_gui TurboWave \
DC-FPGA-Add-On DC-FPGA-Accelerator DC-XG PhysOpt-ClockTree PhysOpt-Extraction \
PhysOpt-Routing RouteCompiler fpc_foundation fpc_pna fpc_utils fpc_special1 fpc_special2 \
fpc_special3 Test-Validate Test-Accelerate-Max Formality-DV chiparch_migrate planet_migrate \
DesignWare-ARMCORES-tlm DesignWare-AMBA-tlm Test-LBIST-Integration VHDL-Compiler-Presto \
primepower_vcd Test-Beta-7 Test-Beta-8 Test-Beta-9 Test-STDVR Test-MBIST-Integration \
HDL-Compiler-SystemVerilog primepower_beta MV-Opt PhysOpt-VH Formality-TX \
Formality-Distributed PhysOpt-Integration PhysOpt-Route PhysOpt-Beta-Milkyway \
PhysOpt-Beta-SI PhysOpt-Beta-CTS PhysOpt-Beta-Route PhysOpt-Route-TD Milkyway-Interface \
Test-Fault-Max PAW PsynGui-ChipMap Formality-ESP PhysOpt-XG PsynGui-AARender \
DC-FPGA-Add-On-to-DC Test-Compression-ATPG Test-Compression-Synthesis HDL-Compiler-Old \
VHDL-Compiler-Old Test-Mbist-Program Test-Mbist-Bitstream Galileo Galileo-PSYN Galileo-PnR \
Galileo-GUI NanoTime NanoTime-PathMill-Shared Galileo-Internal-Only PhysOpt-MV Astro-MV \
Galaxy-PSYN Galaxy-PNR Galaxy-Common Galaxy-GUI-PSYN Galaxy-GUI-PNR Galaxy-FP Galaxy-Power \
Galaxy-IU Galaxy-DFT Galaxy-Prototype" ck=1
PACKAGE Synopsys_main_7 snpslmd 2020.12 00308011D58D2BD88B86 COMPONENTS="Galaxy-DFY Galaxy-Beta \
Galaxy-Internal-Only PrimeTime-New-Technology Galaxy-ICC PrimeRail Power-Optimization-Beta1 \
Power-Optimization-Beta2 Formality-Beta1 Formality-Beta2 Galaxy-MV STAR-RC2_MANAGER \
Galaxy-MCMM PrimeTime-PX DB-Mode DC-Topographical snps_fs_nwave Pathmill-migrate \
Pathmill-plus-migrate primerail_hsim NanoTime-ultra Galaxy-CCS pathmill pathmill_plus amps \
Galaxy_FP_Beta Galaxy_MultiRoute4 Galaxy_MultiRoute8 PrimeTime-VX Galaxy-AdvRules \
Galaxy-FlipChip Galaxy-AdvCTS Galaxy-FP-Hier Test-SDD-Timing Galaxy-AdvTech Galaxy-AdvOpt \
Galaxy-CTMesh Galaxy-Zroute Test-Power Test-Physical DCT-Congestion DCT-GUI DC-Extension \
Galaxy-FP-MV Galaxy-FP-AdvCTS Galaxy-FP-AdvTech NCX Galaxy-SPG PrimeTime-PX-Statistical \
PrimeTime-PX-New-Technology PrimeRail-New-Technology PrimeRail-static PrimeRail-adv \
Test-CompressionPlus-Syn Test-CompressionPlus-ATPG NCX-addon him_sml" ck=222
.bash设置为:
#环境变量
#Design Compiler
export PATH="/software/synopsys/dc/L-2016.03-SP1/bin:"$PATH
#pts
export PATH="/software/synopsys/pt/M-2016.12-SP1/bin:"$PATH
#vcs
export PATH="/software/synopsys/vcs/L-2016.06/bin:"$PATH
#dve
export PATH="/software/synopsys/vcs/L-2016.06/gui/dve/bin:"$PATH
#verdi
export PATH="/software/synopsys/verdi/Verdi3_L-2016.06-1/bin:"$PATH
#lmgrd
export PATH="/software/synopsys/scl11.9/linux/bin:"$PATH
#start synopsys license using lmgrd
alias lmli2="lmgrd -c /software/synopsys/license/synopsys.dat -l ~/syn_lic.log"
export SYNOPSYS="/software/synopsys/dc/L-2016.03-SP1"
export SNPSLMD_LICENSE_FILE=27000@localhost.localdomain
export LM_LICENSE_FILE=/software/synopsys/license/synopsys.dat
export PT_HOME="/software/synopsys/pt/M-2016.12-SP1"
export VCS_HOME="/software/synopsys/vcs/L-2016.06"
export DVE_HOME="/software/synopsys/vcs/L-2016.06/gui/dve"
export VERDI_HOME="/software/synopsys/verdi/Verdi3_L-2016.06-1"
alias dc="dc_shell"
alias dv="design_vision"
alias vcs="vcs"
alias dve="dve"
alias verdi="verdi"
alias pt="primetime"
/etc/hosts 设置为:
127.0.0.1localhost localhost.localdomain localhost4 localhost4.localdomain4
::1localhost localhost.localdomain localhost6 localhost6.localdomain6
127.0.0.1localhost.localdomain
请各位大神帮忙看下,谢谢了。
0.更改synopsys.src里面的日期到31-dec-2029. 1.用NewSynopsysLicmaker2里面的工具生成secret data和license file(Synopsys.src),linux服务器上使用wine操作,参考Synopsys Licensing QuickStart Guide。 2.替换scl_keygenMMabc.zip\Synopsys.src,使用scl_keygenMMabc.zip生成license.dat文件。
也出现这样问题,同问
可帮远程搞定license问题,QQ 2960532559
可帮远程搞定lic问题 Q 2960532559
建议更换用户名,不要使用localhost.
可以先sssverify synopsys.dat
看看结果是不是
Integrity check report for license file "/opt/synopsys/v18.06/admin/license/synopsys.dat".
Report generated on 01-Mar-2020 (SCL_2018.06)
---------------------------------------------------------
Checking the integrity of the license file....
Valid SSS feature found.
Licensed to mammoth//ZWT 2006
Siteid: <No Site Id>, Server Hostid: 00505638ECAA, Issued on: N/A
License file integrity check PASSED!
---------------------------------------------------------
You may now USE this license file to start your license server.
Please don't edit or manipulate the contents of this license file.
可以提供一下那些链接吗。NewSynopsysLicmaker2
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