安装 DC时遇到问题。求助
系统是REDHAT LINUX5 安装都用的ROOT
DC的版本为200809
我安装LIC以及DC时都按教程装的,先来LIC的COMMON再LINUX,DC也是一样,
LICENSE也是网上的教程,都改好了的,SSSVERIFY也过了的,用./lmgrd -c也验证了LICENSE,结果出了好长,有几个屏幕吧,应该是已经过了,没太细看
LICENSE里面改的东西如下:
SERVER localhost.localdomAIn 000c29c7eebf 27000
DAEMON snpslmd /root/synopsys/scl/linux/bin/snpslmd
FEATURE SSS snpslmd 1.0 31-dec-2020 uncounted DDDE5D3F2C66640E15AD \
VENDOR_STRING="69656 d1d88 34cc3 36d92 e9f0a 04587 634bd 6366c \
96b0f e71" HOSTID=000c29c7eebf ISSUER="Team ZWT 2006" \
NOTICE="Licensed to mammoth//ZWT 2006 [PLEASE DO NOT DELETE THIS \
SSS KEY]" SN=RK:1978-0:001224:0 START=1-jan-2006
用户目录下的.bashrc也改了的。如下:
export SYNOPSYS="/root/synopsys/dc"
export SNPSLMD_LICENSE_FILE=27000@localhost.localdomain
export PATH="/root/synopsys/dc/bin:"$PATH
#lmgrd
export PATH="/root/synopsys/scl/linux/bin:"$PATH
#start synopsys license using lmgrd
alias lmli2="lmgrd -c /root/synopsys/license/synopsys.dat -l /root/syn_lic.log"
上面前两行,就是export SYN...和export SNP...本来和教程里面一样在下面,后来看别人遇到问题的时候的解决办法,我就把它们调到上面去了
然后感觉一切都OK了,就重启,用DC或者 DC_SHELL出来的提示一样的:
Fatal: Design Compiler is not enabled. (DCSH-1)
把ligrd -c的东西也放上来了
21:43:33 (lmgrd) -----------------------------------------------
21:43:33 (lmgrd)Please Note:
21:43:33 (lmgrd)
21:43:33 (lmgrd)This log is intended for debug purposes only.
21:43:33 (lmgrd)In order to capture accurate license
21:43:33 (lmgrd)usage data into an organized repository,
21:43:33 (lmgrd)please enable report logging. Use Macrovision's
21:43:33 (lmgrd)software license administrationsolution,
21:43:33 (lmgrd)FLEXnet Manager, toreadily gain visibility
21:43:33 (lmgrd)into license usage data and to create
21:43:33 (lmgrd)insightful reports on critical information like
21:43:33 (lmgrd)license availability and usage. FLEXnet Manager
21:43:33 (lmgrd)can be fully automated to run these reports on
21:43:33 (lmgrd)schedule and can be used to track license
21:43:33 (lmgrd)servers and usage across a heterogeneous
21:43:33 (lmgrd)network of servers including Windows NT, Linux
21:43:33 (lmgrd)and UNIX. Contact Macrovision at
21:43:33 (lmgrd)www.macrovision.com for more details on how to
21:43:33 (lmgrd)obtain an evaluation copy of FLEXnet Manager
21:43:33 (lmgrd)for your enterprise.
21:43:33 (lmgrd)
21:43:33 (lmgrd) -----------------------------------------------
21:43:33 (lmgrd)
21:43:33 (lmgrd)
21:43:33 (lmgrd) The license server manager (lmgrd) running as root:
21:43:33 (lmgrd)This is a potential security problem
21:43:33 (lmgrd)and is not recommended.
[root@localhost ~]# 21:43:33 (lmgrd) FLEXnet Licensing (v10.8.5.0 build 31891 i86_re3) started on localhost.localdomain (linux) (7/30/2011)
21:43:33 (lmgrd) Copyright (c) 1988-2006 Macrovision Europe Ltd. and/or Macrovision Corporation. All Rights Reserved.
21:43:33 (lmgrd) US Patents 5,390,297 and 5,671,412.
21:43:33 (lmgrd) World Wide Web:http://www.macrovision.com
21:43:33 (lmgrd) License file(s): /root/synopsys/license/synopsys.dat
21:43:33 (lmgrd) lmgrd tcp-port 27000
21:43:33 (lmgrd) Starting vendor daemons ...
21:43:33 (lmgrd) Started snpslmd (internet tcp_port 41799 pid 4832)
21:43:33 (snpslmd) FLEXnet Licensing version v10.8.5.3 build 59306 i86_re3
21:43:34 (snpslmd) Synopsys Corporate Licensing (SCL) Release: version SCL_10.9.3
21:43:34 (snpslmd) Server started on localhost.localdomain for: SSS
21:43:34 (snpslmd) SABER_GUIDEGalaxy-DFYGalaxy-Beta
21:43:34 (snpslmd) Galaxy-Internal-Only PrimeTime-New-Technology Galaxy-ICC
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21:43:34 (snpslmd) Formality-Beta1 Formality-Beta2 Galaxy-MV
21:43:34 (snpslmd) STAR-RC2_MANAGER Galaxy-MCMM PrimeTime-PX
21:43:34 (snpslmd) DB-ModeDC-Topographical snps_fs_nwave
21:43:34 (snpslmd) Pathmill-migrate Pathmill-plus-migrate primerail_hsim
21:43:34 (snpslmd) NanoTime-ultraGalaxy-CCSpathmill
21:43:34 (snpslmd) pathmill_plusampsGalaxy_FP_Beta
21:43:34 (snpslmd) Galaxy_MultiRoute4 Galaxy_MultiRoute8 PrimeTime-VX
21:43:34 (snpslmd) Galaxy-AdvRules Galaxy-FlipChip Galaxy-AdvCTS
21:43:34 (snpslmd) Galaxy-FP-HierTest-SDD-Timing Galaxy-AdvTech
21:43:34 (snpslmd) Galaxy-AdvOptGalaxy-CTMeshGalaxy-Zroute
21:43:34 (snpslmd) Test-PowerTest-PhysicalDCT-Congestion
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21:43:34 (snpslmd) Galaxy-FP-AdvCTS Galaxy-FP-AdvTech NCX
21:43:34 (snpslmd) Galaxy-SPGPrimeTime-PX-Statistical PrimeTime-PX-New-Technology
21:43:34 (snpslmd) PrimeRail-New-Technology PrimeRail-static PrimeRail-adv
21:43:34 (snpslmd) Test-CompressionPlus-Syn Test-CompressionPlus-ATPG NCX-addon
21:43:34 (snpslmd) him_smlhim_smlBC-FPGA
21:43:34 (snpslmd) SC-FPGADC-Ultraexample_feature
21:43:34 (snpslmd) leda-mxTest-LBIST-ATPG DC-FPGA-Features
21:43:34 (snpslmd) Test-DFTC-TMAXPhysOpt-Hierarchy PhysOpt-Onroute
21:43:34 (snpslmd) PhysOpt-Parallel PhysOpt-SIPrimepower
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21:43:34 (snpslmd) DC-FPGA-Accelerator DC-XGPhysOpt-ClockTree
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21:43:34 (snpslmd) fpc_special1 fpc_special2fpc_special3
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21:43:34 (snpslmd) Test-Beta-9Test-STDVRTest-MBIST-Integration
21:43:34 (snpslmd) HDL-Compiler-SystemVerilog primepower_beta MV-Opt
21:43:34 (snpslmd) PhysOpt-VHFormality-TXFormality-Distributed
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21:43:34 (snpslmd) PhysOpt-Beta-SI PhysOpt-Beta-CTS PhysOpt-Beta-Route
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21:43:34 (snpslmd) PAWPsynGui-ChipMap Formality-ESP
21:43:34 (snpslmd) PhysOpt-XGPsynGui-AARender DC-FPGA-Add-On-to-DC
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21:43:34 (snpslmd) VHDL-Compiler-Old Test-Mbist-Program Test-Mbist-Bitstream
21:43:34 (snpslmd) GalileoGalileo-PSYNGalileo-PnR
21:43:34 (snpslmd) Galileo-GUINanoTimeNanoTime-PathMill-Shared
21:43:34 (snpslmd) Galileo-Internal-Only PhysOpt-MVAstro-MV
21:43:34 (snpslmd) Galaxy-PSYNGalaxy-PNRGalaxy-Common
21:43:34 (snpslmd) Galaxy-GUI-PSYN Galaxy-GUI-PNRGalaxy-FP
21:43:34 (snpslmd) Galaxy-Power Galaxy-IUGalaxy-DFT
21:43:34 (snpslmd) Galaxy-Prototype DesignWare-MPEG2-VDEC-Source DesignWare-MPEG2
21:43:34 (snpslmd) DesignWare-MPEG2-Source DesignWare-SystemIO DesignWare-SystemIO-Source
21:43:34 (snpslmd) DesignWare-USBDesignWare-USB-Source DesignWare-USB2
21:43:34 (snpslmd) DesignWare-USB2-Source DesignWare-1394 DesignWare-1394-Source
21:43:34 (snpslmd) DesignWare-ETHERNET DesignWare-ETHERNET DesignWare-ETHERNET-Source
21:43:34 (snpslmd) DesignWare-MemoryBist DesignWare-MemoryBist-Source COSSAP_amr
21:43:34 (snpslmd) DCExpert-PrimeTime PrimeTime-SIPrimeTime-SI
21:43:34 (snpslmd) RTL-Power-Analysis DesignWare-MPEG DesignWare-MPEG-Source
21:43:34 (snpslmd) DesignWare-TCADesignWare-TCA-Source DesignWare-BIST
21:43:34 (snpslmd) DesignWare-BIST-Source SC-BCSC-RTL
21:43:34 (snpslmd) Formality-Transit Formality-E1Test-Map
21:43:34 (snpslmd) Test-Compile-Max Test-Compile-Share Test-ATPG-Max
21:43:34 (snpslmd) Test-Beta-3Test-Beta-4Test-Beta-5
21:43:34 (snpslmd) Test-Beta-6Test-CA-2Test-CA-3
21:43:34 (snpslmd) Test-CA-4Test-PR-1Test-PR-2
21:43:34 (snpslmd) Test-PR-3Test-PR-4route66
21:43:34 (snpslmd) encoreHLS-SystemCHLS-FPGA-SystemC
21:43:34 (snpslmd) CoCentric-SYS-DesignCenter CoCentric-SYS-Simulator CoCentric-SYS-Davis
21:43:34 (snpslmd) CoCentric-SYS-HWSimIF CoCentric-SYS-HWflow COSIM-SRO
21:43:34 (snpslmd) COSIM-VCSCOSIM-MTICOSIM-VXL
21:43:34 (snpslmd) COSIM-LFGCOSIM-NCVCoCentric-FXD-Interpolator
21:43:34 (snpslmd) CoCentric-FXD-GUI CoCentric-FXD-Simulation CoCentric-SYS-RDK-adsl
21:43:34 (snpslmd) MC-RetimeMC-RetimeDC64
21:43:34 (snpslmd) Constraint_Translation CoCentric-SYS-RDK-cdma2000 Formality-TransForm
21:43:34 (snpslmd) DesignWare-6811-Source FPGA-Express-MERCURY-Optimizer coreSynthesis
21:43:34 (snpslmd) coreAssemblercoreBuildercoreConsultant
21:43:34 (snpslmd) SC-HLSCoCentric-SYS-RDK-docsis SC-COSIM
21:43:34 (snpslmd) PS_CTSPS_Noise_Optimization PS_Extraction
21:43:34 (snpslmd) Test-RTL-Tristate DesignWare DesignWare
21:43:34 (snpslmd) FPGA-Express-APEX2-Optimizer Test-CTL-ModelTest-Core-Wrapper
21:43:34 (snpslmd) Test-Core-Integration Test-LBIST-Synthesis PhysOpt-Beta
21:43:34 (snpslmd) COSSAP_vsiccg_cyc COSSAP_vsiccg_mti COSSAP_vsiccg_vcs
21:43:34 (snpslmd) COSSAP_vsiccg_vlgxl COSSAP_vsivcgCOSSAP_vsivcg_vlgxl
21:43:34 (snpslmd) COSSAP_xdcgCOSSAP_xvcgCOSSAP_xvsi
21:43:34 (snpslmd) Fridge-GUIFridge-Simulation Fridge-Interpolator
21:43:34 (snpslmd) FPGA-Express FPGA-Express-32OODx-Optimizer FPGA-Express-A1200XL-Optimizer
21:43:34 (snpslmd) FPGA-Express-A1400-Optimizer FPGA-Express-A3200DX-Optimizer FPGA-Express-A42MX-Optimizer
21:43:34 (snpslmd) FPGA-Express-A54SX-Optimizer FPGA-Express-Constraint-Mgr FPGA-Express-EPF10k-Optimizer
21:43:34 (snpslmd) FPGA-Express-EPF6k-Optimizer FPGA-Express-EPF8k-Optimizer FPGA-Express-EPM7k-Optimizer
21:43:34 (snpslmd) FPGA-Express-EPM9k-Optimizer FPGA-Express-ORCA2-Optimizer FPGA-Express-ORCA3-Optimizer
21:43:34 (snpslmd) FPGA-Express-Open-Optimizer FPGA-Express-VHDL-Base FPGA-Express-VHDL-Training
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21:43:34 (snpslmd) FPGA-Express-XC4k-Optimizer FPGA-Express-XC5k-Optimizer FPGA-Express-XC9k-Optimizer
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21:43:34 (snpslmd) CBA-FrameCBA-Blk-ImportCBA-Blk-Export
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21:43:34 (snpslmd) ProMA-L1ProMA-L2ProMA-LD
21:43:34 (snpslmd) ProMA-P1ProMA-P2PSG-SDE
21:43:34 (snpslmd) CBA-DS-BetaProMA-PDCOSSAP_ddk_dsp16000
21:43:34 (snpslmd) COSSAP_adslCOSSAP_vsiccg_mtivlg Test-RTL-Check
21:43:34 (snpslmd) DW-IP-DEBUGelectromigration_drc electromigration_drc
21:43:34 (snpslmd) ACSPhysOptPhysOpt-Ultra
21:43:34 (snpslmd) PhysOpt-GUIBOA-BRTDesignWare-VERA
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21:43:34 (snpslmd) VHDL-ScSimVHDL-VirSimELGRECO_DesignCenter
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21:43:34 (snpslmd) FPGA-Express-isp3K-Optimizer FPGA-Express-isp5K-Optimizer FPGA-Express-isp6K-Optimizer
21:43:34 (snpslmd) FPGA-Express-isp8K-Optimizer FPGA-Express-APROA-Optimizer FCII-Altera-Edition
21:43:34 (snpslmd) DesignWare-PCI-X DesignWare-PCI-X-Source DesignWare-MPEG2-VDEC
21:43:34 (snpslmd) Test-AnalysisTest-FormatTest-ScanRoute
21:43:34 (snpslmd) Test-Library Test-DFT-TopTest-Compile
21:43:34 (snpslmd) Test-Compile-Remodel Test-Analysis-RTL Test-Analysis-GUI
21:43:34 (snpslmd) Test-MbistTest-Mbist-DRAM Test-Mbist-CAM
21:43:34 (snpslmd) Test-Mbist-FLASH Test-Mbist-Diagnosis Test-Mbist-Multiport
21:43:34 (snpslmd) Test-Mbist-Algorithm Test-ATPG-PROTest-ATPG-XP
21:43:34 (snpslmd) Test-ATPG-Limited Test-ATPG-30Test-ATPG-Ultra
21:43:34 (snpslmd) Test-DelayTest-FaultsimTest-Diagnosis
21:43:34 (snpslmd) Test-Accelerator Test-Faultsim-8L Test-Eval
21:43:34 (snpslmd) Test-BetaTest-CATest-Beta-2
21:43:34 (snpslmd) DesignWare-Foundation-Ultra VHMC-GenUnlocked VHMC-Eval
21:43:34 (snpslmd) VHMC-Runtime COSSAP_adpcmCOSSAP_arm
21:43:34 (snpslmd) COSSAP_bdeCOSSAP_celpCOSSAP_chart
21:43:34 (snpslmd) COSSAP_cw_filter_hdl COSSAP_cw_filter_sds COSSAP_dab
21:43:34 (snpslmd) COSSAP_dcg_ad21020 COSSAP_dcg_ansic COSSAP_dcg_ariel32c
21:43:34 (snpslmd) COSSAP_dcg_feCOSSAP_dcg_gcCOSSAP_dcg_krc
21:43:34 (snpslmd) COSSAP_dcg_lsic30s COSSAP_dcg_m96000 COSSAP_dcg_mp
21:43:34 (snpslmd) COSSAP_ddk_armCOSSAP_ddk_devlp COSSAP_ddk_dsp1610
21:43:34 (snpslmd) COSSAP_ddk_hawk COSSAP_ddk_necCOSSAP_ddk_oak
21:43:34 (snpslmd) COSSAP_ddk_pine COSSAP_ddk_ssp16xx COSSAP_ddk_tic5x
21:43:34 (snpslmd) COSSAP_ddk_tic5xx COSSAP_dectCOSSAP_dvb
21:43:34 (snpslmd) COSSAP_eccCOSSAP_gsmdveCOSSAP_gsmdve_utils
21:43:34 (snpslmd) COSSAP_gsmefrsc COSSAP_gsmeq COSSAP_gsmfrcc
21:43:34 (snpslmd) COSSAP_gsmfrscCOSSAP_gsmhrccCOSSAP_gsmhrsc
21:43:34 (snpslmd) COSSAP_gsmphyCOSSAP_is136COSSAP_is95
21:43:34 (snpslmd) COSSAP_matlabCOSSAP_mfdCOSSAP_mpeg2
21:43:34 (snpslmd) COSSAP_pdcCOSSAP_qedCOSSAP_sds
21:43:34 (snpslmd) COSSAP_srcfd COSSAP_vcg_generic COSSAP_vcg_synopsys
21:43:34 (snpslmd) COSSAP_vcg_vantage COSSAP_vdefcgCOSSAP_vdefcg_vlgxl
21:43:34 (snpslmd) COSSAP_vsiccgBC-FPGA-VHDLVivace-Simulator
21:43:34 (snpslmd) Vivace-GUIVivace-Elaborator Early-Access-Technology
21:43:34 (snpslmd) ECO-Compiler ECO-CompilerCA-Frame
21:43:34 (snpslmd) CA-UtilsCA-FoundationCA-CP-Basic
21:43:34 (snpslmd) CA-CP-StandardCA-CP-AdvancedCA-Chip-Edit
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21:43:34 (snpslmd) VDesktop-DebugVivace-HDL-Analyzer Vivace-VHDL-Analyzer
21:43:34 (snpslmd) Vivace-Model-Compiler Vivace-CoreVivace-Debug
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21:43:34 (snpslmd) ARKOS-CARKOS-DARKOS-E
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21:43:34 (snpslmd) Test-IEEE-Std-1149-1 HighLevel-Power-Analysis HighLevel-Power-Optimization
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21:43:34 (snpslmd) DC-Ultra-Opt Protocol-Compiler-Analysis Protocol-Compiler-COutput
21:43:34 (snpslmd) Cyclone-cosimStamp-CompilerDesignWare-Foundation-Power
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21:43:34 (snpslmd) SNPS-CSLMC-Pro-RPSynLib-VHDLSimMdl
21:43:34 (snpslmd) SynLib-VerilogSimMdl FPGA-HDL-Bundle FPGA-VHDL-Bundle
21:43:34 (snpslmd) VSS-TranVSS-NEC-TranCD-MSSC-Cross-Probe
21:43:34 (snpslmd) CD-MSSC-Netlist CD-GDII-Link Test-IDDQ
21:43:34 (snpslmd) Test-BISTTest-BSDLPower-Optimization
21:43:34 (snpslmd) DC-BetaHDL-AdvisorDesignSource
21:43:34 (snpslmd) DS-Schem-Gen DS-VerinetDS-Vhdlnet
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21:43:34 (snpslmd) DesignSource-Package DS-Schem-Gen-Package DS-Verinet-Package
21:43:34 (snpslmd) DS-Vhdlnet-Package EDIF-ReaderEDIF-Netlist-Writer
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21:43:34 (snpslmd) TDL-ReaderTDL-WriterEspresso-Reader
21:43:34 (snpslmd) Espresso-Writer Equation-Reader Equation-Writer
21:43:34 (snpslmd) FSM-ReaderFSM-WriterMIF-Reader
21:43:34 (snpslmd) MIF-WriterVHDL-To-BEVHDL-Analyzer
21:43:34 (snpslmd) Parse-Tree-Translator Verilog-To-BEVerilog-Parser
21:43:34 (snpslmd) Cyclone-VHDL-Analyzer Cyclone-HDL-Analyzer Cyclone-Elaborator
21:43:34 (snpslmd) Cyclone-Simulator Cyclone-GUIProtocol-Compiler-UI
21:43:34 (snpslmd) Protocol-Compiler-Synth SGE-ToolSyn-Library-Compiler
21:43:34 (snpslmd) Cyclone-Core HDL-Advisor-Estimator HDL-Advisor-Shell-Estimator
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21:43:34 (snpslmd) DesignSource-Estimator-Package DS-Schem-Gen-Estimator-Package DS-Verinet-Estimator-Package
21:43:34 (snpslmd) DS-Vhdlnet-Estimator-Package Estm-HDL-Advisor-Package EDIF-Netlist-Read-DC
21:43:34 (snpslmd) EDIF-Netlist-Write-DC CD-GDICD-REX
21:43:34 (snpslmd) TC-BetaShortCut-DC-Pro ShortCut-DC-Expert
21:43:34 (snpslmd) TBM-Manager-UITBM-VSS-CheckBC-VHDL
21:43:34 (snpslmd) BC-HDLVSS-BackplaneDesignWare-Cardbus
21:43:34 (snpslmd) DesignWare-ISA-PnP DesignWare-8051MCU Protocol-Compiler-FML
21:43:34 (snpslmd) Power-Optimization-Upgrade Shortcut-FPGADesignWare-Foundation
21:43:34 (snpslmd) BC-FPGA-HDLWRITECTV-Interface
21:43:34 (snpslmd) DC-Cadence-Interface DC-ExpertDC-Falcon-Interface
21:43:34 (snpslmd) DC-Layout-Interface DC-SDF-Interface Design-Analyzer
21:43:34 (snpslmd) Design-Compiler Designware-Basic Designware-FPGA-Basic
21:43:34 (snpslmd) DW-Developer DesignWare-FloatingPoint DesignWare-8051
21:43:34 (snpslmd) DesignWare-8051-Source DesignWare-PCIDesignWare-PCI-Source
21:43:34 (snpslmd) ECL-Compiler FPGA-CompilerFPGA-Library-Compiler
21:43:34 (snpslmd) FPGA-OptionHDLHDL-Compiler
21:43:34 (snpslmd) Interface-Shell Library-Compiler LSI-Interface
21:43:34 (snpslmd) Mentor-Interface SGE-DC-Interface SGE-EDIF-Interface
21:43:34 (snpslmd) SGE-VHDL-Interface SGE-Verilog-Interface SynLib-ALU
21:43:34 (snpslmd) SynLib-AdvMathSynLib-EvalSynLib-Seq
21:43:34 (snpslmd) SynopsysSynopsys-QueueSynopsys-Release
21:43:34 (snpslmd) TDL-InterfaceTest-ATPGTest-Custom-Protocols
21:43:34 (snpslmd) Test-CompilerTest-Compiler-Remodel Test-Compiler-Plus
21:43:34 (snpslmd) DesignTimeVHDL-CompilerVSS-Analyzer
21:43:34 (snpslmd) VSS-CLIVSS-Cadence-Interface VSS-Debugger
21:43:34 (snpslmd) VSS-Falcon-Interface VSS-LAI-ModelsVSS-LMSI
21:43:34 (snpslmd) VSS-Lib-ToolsVSS-SDF-Interface VSS-SGE-Tool
21:43:34 (snpslmd) VSS-SimulatorVSS-UtilitiesVSS-Wave-Display
21:43:34 (snpslmd) VSS-XP-Accelerator VSS-VIP-Interface VSS-GateSim
21:43:34 (snpslmd) VSS-CompiledSim VSS-SPCVSS-Verilog-PLI
21:43:34 (snpslmd) Floorplan-Management SNPS-KeygenSynLib-FltTol
21:43:34 (snpslmd) SynLib-ControlTestSimTestManager
21:43:34 (snpslmd) Leakage-PowerPower-AnalysisVSS-Model-Developer
21:43:34 (snpslmd) CD-Model-Developer CD-Compiled-Sys-Gen CD-Compiled-Lib-Gen
21:43:34 (snpslmd) CD-Present-Layer-Gen CD-Present-Builder CD-Vhdlgen-Gen
21:43:34 (snpslmd) CD-Vhdlgen-GUIBehavioral-Compiler VSS-SmartModels
21:43:34 (snpslmd) DC-Min-Area-Retime DesignWare-PCIbasic SynLib-PCIbasic
21:43:34 (snpslmd) SynLib-DSPFIRRMAN_RUNVT_VCS_NTBE
21:43:34 (snpslmd) XVVCDebugger VCSCompilerVCSRuntime
21:43:34 (snpslmd) VCSRuntimeLimited VCSNativeCodeVCSiCompiler
21:43:34 (snpslmd) VCSiRuntimeVCSiRuntimeLimited VCSParallelCompiler
21:43:34 (snpslmd) VCSParallelRuntime VCSParallelThread VMCCompiler
21:43:34 (snpslmd) VMCRuntimeVMCEvaluationVCSTools
21:43:34 (snpslmd) VCSlm_HmLMCSwiftVCSPostProcDebugger
21:43:34 (snpslmd) VMCGeneratorUnlocked VMCExpress_Compiler VCSAMSCompiler
21:43:34 (snpslmd) VCSAMSRuntimeVT_UnifiedCoverage VT_64Bit
21:43:34 (snpslmd) VT_OtherTechnology VT_CoverageURGVT_NativeTBDebuggerGui
21:43:34 (snpslmd) VT_NTBVT_CBUGVT_Visual
21:43:34 (snpslmd) VT_SVAssertionCompiler VT_SDebugVT_Coverage
21:43:34 (snpslmd) VT_DVENTBVT_PioneerVT_AssertionIP
21:43:34 (snpslmd) VT_SYSTEMC21 VT_AssertionsRuntime VT_CoverageRuntime
21:43:34 (snpslmd) VT_LCA_Coverage VT_LCA_DEBUG VT_LCA_Assertions
21:43:34 (snpslmd) VT_LCA_Language VT_LCA_MixedSignal vera_rtime
21:43:34 (snpslmd) VT_DVE_COVVT_VCS_BETA_Features VT_VCS_LCA_Features
21:43:34 (snpslmd) VT_VCS_Advanced_Features VT_VCS_BETA_Program VT_PVCSCompiler_Net
21:43:34 (snpslmd) VCSOldPostProcDebugger_Node FusionVantageLmcInterface VCSCompile
21:43:34 (snpslmd) VCSiCompileVCSOldPostProcDebugger_Net vsecP_OEM_VCS_FUJITSU_GEN_NL
21:43:34 (snpslmd) vsecP_OEM_VCS_FUJITSU_RUN_NL vsecP_OEM_VCS_FUJITSU_USE_NL vsecP_OEM_VCS_FUJITSU_GEN_NW
21:43:34 (snpslmd) vsecP_OEM_VCS_FUJITSU_RUN_NW vsecP_OEM_VCS_FUJITSU_USE_NW XVCSiDebugger
21:43:34 (snpslmd) XVCSDebugger VCS-Express-Compile VCS-Express-Runtime
21:43:34 (snpslmd) VCSCompiler_Node VCSRuntime_Node VCSRuntimeLimited_Node
21:43:34 (snpslmd) VCSNativeCode_Node VCSCompiler_Net VCSRuntime_Net
21:43:34 (snpslmd) VCSRuntimeLimited_Net VCSNativeCode_Net VCSiCompiler_Node
21:43:34 (snpslmd) VCSiRuntime_Node VCSiDebugger_Node VCSiRuntimeLimited_Node
21:43:34 (snpslmd) VCSiCompiler_Net VCSiRuntime_Net VCSiDebugger_Net
21:43:34 (snpslmd) VCSiRuntimeLimited_Net VCSDebugger_Node VCSParallelCompiler_Node
21:43:34 (snpslmd) VCSParallelRuntime_Node VCSParallelThread_Node VCSTools_Node
21:43:34 (snpslmd) VCSlm_Hm_NodeVCSPostProcDebugger_Node VCSDebugger_Net
21:43:34 (snpslmd) VCSParallelCompiler_Net VCSParallelRuntime_Net VCSParallelThread_Net
21:43:34 (snpslmd) VCSTools_Net VCSTools_NetVCSlm_Hm_Net
21:43:34 (snpslmd) VCSPostProcDebugger_Net VMCCompiler_Node VMCRuntime_Node
21:43:34 (snpslmd) VMCEvaluation_Node VMCGeneratorUnlocked_Node VMCExpress_Compiler_Node
21:43:34 (snpslmd) VMCCompiler_Net VMCRuntime_NetVMCEvaluation_Net
21:43:34 (snpslmd) VMCGeneratorUnlocked_Net VMCExpress_Compiler_Net LMCSwift_Node
21:43:34 (snpslmd) LMCSwift_Net CoverMeterCoverMeterOBC
21:43:34 (snpslmd) VCSAMSCompiler_Net VCSAMSRuntime_Net VT_Assertions
21:43:34 (snpslmd) SNPS-Assertions VT_Testbench VT_SystemVerilog
21:43:34 (snpslmd) VCSMXRunTime_Net VCSMXiRunTime_Net Magellan-Sim
21:43:34 (snpslmd) VT_SVDesignVT_SVAssertions VT_SVTestbench
21:43:34 (snpslmd) VT_NativeTestbench VT_DVEVT_UCLI
21:43:34 (snpslmd) VT_TestbenchRuntime VT_LCA_Testbench PVCSCompiler_Net
21:43:34 (snpslmd) PVCSRuntime_Net VT_VCS_Power_Management VT_VCS_Checker
21:43:34 (snpslmd) VT_VCS_EchoVHDL-ToolsCmMonitor
21:43:34 (snpslmd) hspicehspice_cosimhspice_adv
21:43:34 (snpslmd) hspicewinencryptmetaencrypt3des
21:43:34 (snpslmd) hspicevahspicerfCOSMOS_SCOPE
21:43:34 (snpslmd) COSMOS_GUIDE CXp_GUICXp_Analysis
21:43:34 (snpslmd) CXp_CircuitEnvironment him_modhim_mm_pi
21:43:34 (snpslmd) him_mb
21:43:34 (snpslmd)
21:43:34 (snpslmd) Licenses are case sensitive for TE_CATS
21:43:34 (snpslmd)
21:43:34 (snpslmd) EXTERNAL FILTERS are OFF
21:43:34 (lmgrd) snpslmd using TCP-port 41799
21:43:34 (snpslmd) Serving features for the following vendor names:
snpslmdCADABRAEPICISE-TCADdTE_CATSadalmdanagramarchprodavantdchrysalisdeveresthscdinnologdla_dmonledametasoftdnassdnumeritchdsaber_dmnsandworksigmacdslatsnpsOEM1snpsOEM2snpsOEM3snpsOEM4snpsOEM5snpsOEM6snpsOEM7snpsOEM8snpsOEM9ssilmdsynopsysdtmaldvcsd
21:43:36 (snpslmd) ------------------------------------------------------------------
21:43:36 (snpslmd) Checking the integrity of the license file....
21:43:36 (snpslmd) Valid SSS feature found.
21:43:36 (snpslmd) The feature is needed to enable the other keys in your license file.
21:43:36 (snpslmd) -------------------------------------------------------------
什么版本的DC
200809
顶一个,让大侠给我看看
snpslmd_license_file应该在cshrc下对应setenv
大侠说得详细一点,谢谢!
哎呀 我也是这样啊 蛋都碎了
DC is working but cannot open DC ultra
Good job