求助，请问syn_vY-2006.6和sold_vY-2006.6各是什么软件？他们有什么区别或者关系
时间：03-15
整理：3721RD
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如题，另外LDV50只有verilog-xl吗?他同nc_verilog有啥区别?soc52是不是encounter?先谢谢大家的帮助
前面一个是design compiler ，后面一个似乎是在线帮助，不大肯定，小编有吗?是否可以分享一个。
后面的就不知道了。
实在抱歉，公司的，在内网拿不出来
Basically these two simulators (NC-Verilog and Verilog-XL) are very different in terms of architecture and engine itself.
NC-Verilog is compiled-code generator and Verilog-XL is an interpreter. All the Verilog modules compiled by NC-Verilog are objects by which the engine elaborate and simulate.
NC-Verilogand NC-VHDL can read in Verilog and VHDL design, respectively. They can used in Pre-Sim (after the design is synthesizied to netlist) and Post-Sim (netlist after place and route), as long as the netlist is either in Verilog or VHDL.
NC-VERILOG 和VERILOG-XL的区别。百度来的，总之前一个功能比较强大就是了。这两个应该都是集成在LDV中的。不过现在好像已经升级成IUS了。SOC52就是encounter，是它的一个版本吧。
谢谢分享，好东西呀